2020-07-06  Nick Clifton  <nickc@redhat.com>

	* po/uk.po: Updated Ukranian translation.

2020-07-04  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.
	* po/gas.pot: Regenerate.

2020-07-04  Nick Clifton  <nickc@redhat.com>

	Binutils 2.35 branch created.

2020-07-03  Alan Modra  <amodra@gmail.com>

	PR 26028
	* testsuite/gas/ia64/unwind-ilp32.d: Add -T to readelf options.

2020-07-02  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Check vexswapsources to
	swap two source operands.

2020-07-02  Nick Clifton  <nickc@redhat.com>

	* testsuite/gas/all/fill-1.d: Skip for MeP targets.

2020-07-02  Alex Coplan  <alex.coplan@arm.com>

	* config/tc-aarch64.c (reg_name_p): Fix cast so that we don't
	segfault on negative chars.
	* testsuite/gas/aarch64/reglike-label-unicode-segv.d: New test.
	* testsuite/gas/aarch64/reglike-label-unicode-segv.s: Input.

2020-07-02  Nick Clifton  <nickc@redhat.com>

	PR 26028
	* testsuite/gas/ia64/group-2.d: Add -T option to readelf
	command line.
	* testsuite/gas/ia64/unwind.d: Likewise.
	* testsuite/gas/mmix/bspec-1.d: Likewise.
	* testsuite/gas/mmix/bspec-2.d: Likewise.
	* testsuite/gas/mmix/comment-1.d: Likewise.
	* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.

2020-07-01  Alan Modra  <amodra@gmail.com>

	* config/tc-xc16x.c (md_apply_fix): Add FIXME.

2020-07-01  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/all/eqv-dot.d: xfail targets that set linkrelax
	in data sections, and mep.

2020-06-30  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention x86 NaCl target support removal.
	* config/tc-i386.c: Remove x86 NaCl target support.
	* config/tc-i386.h: Likewise.
	* configure.tgt: Likewise.
	* testsuite/gas/i386/i386.exp: Likewise.
	* testsuite/gas/i386/iamcu-1.d: Likewise.
	* testsuite/gas/i386/iamcu-2.d: Likewise.
	* testsuite/gas/i386/iamcu-3.d: Likewise.
	* testsuite/gas/i386/iamcu-4.d: Likewise.
	* testsuite/gas/i386/iamcu-5.d: Likewise.
	* testsuite/gas/i386/k1om.d: Likewise.
	* testsuite/gas/i386/l1om.d: Likewise.

2020-06-30  Nelson Chu  <nelson.chu@sifive.com>

	* config/tc-riscv.c (riscv_csr_class_check): Removed.  Move the
	checking into riscv_csr_address.
	(riscv_csr_version_check): Likewise.
	(riscv_csr_address): New function.  Return the suitable CSR address
	after checking the ISA dependency and versions.  Issue warnings if
	we find any conflict and -mcsr-check is set.  CSR_CLASS_F and
	CSR_CLASS_DEBUG are unprivileged CSR for now, so don't check the
	priv spec versions for them.
	(reg_csr_lookup_internal): Call riscv_csr_address to find the
	suitable CSR address.
	* testsuite/gas/riscv/priv-reg-fail-fext.d: Remove -mpriv-spec=1.11.
	* testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-fext.l:  We don't care the
	priv spec warnings here.  These warnings are added by accident.
	Remove them and only focus on the ISA dependency warnings.
	* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Updated since
	dscratch0 and dscratch1 are regarded as the unprivileged CSR rather
	than the privileged ones.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
	* testsuite/gas/riscv/priv-reg.s: Likewise.  Add missing debug CSR.
	* testsuite/gas/riscv/priv-reg-version-1p9.d: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p10.d: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p11.d: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.s: Likewise.

2020-06-29  H.J. Lu  <hongjiu.lu@intel.com>

	* tc-i386.c (build_vex_prefix): Support VEX base opcode length > 1.
	(md_assemble): Don't process ImmExt without operands.

2020-06-29  Hans-Peter Nilsson  <hp@bitrange.com>

	PR gas/25331
	* config/tc-mmix.c (md_assemble) <fixup for
	BFD_RELOC_MMIX_BASE_PLUS_OFFSET>: This fixup affects 1 byte, not 8.
	Also, set its fx_no_overflow.
	(md_convert_frag) <case ENCODE_RELAX (STATE_PUSHJSTUB, STATE_ZERO)>: 
	Similarly this fixup affects 4 bytes, not 8 and needs its
	fx_no_overflow set.
	* config/tc-mmix.h (TC_FX_SIZE_SLACK): Don't define.
	* testsuite/gas/mmix/pr25331.d, testsuite/gas/mmix/pr25331.s: New test.

2020-06-29  Alan Modra  <amodra@gmail.com>

	* config/tc-s12z.c: Use C style comments.
	* config/tc-z80.c: Likewise.
	* config/tc-xtensa.c (emit_ld_r_n): Remove commented out code.

2020-06-26  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Process ImmExt without
	operands.

2020-06-26  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (check_VecOperands): Replace vecsib with sib.
	Replace VecSIB128, VecSIB256 and VecSIB512 with VECSIB128,
	VECSIB256 and VECSIB512, respectively.
	(build_modrm_byte): Replace vecsib with sib.

2020-06-26  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/nop-1-suffix.d: New.
	* testsuite/gas/i386/i386.exp: Run new test.

2020-06-26  Pat Bernardi  <bernardi@adacore.com>

	* config/tc-m68k.c (m68k_elf_gnu_attribute): New function.
	(md_pseudo_table): Handle "gnu_attribute".
	* doc/as.texi: Document GNU attribute for M68K.

2020-06-25  Nick Clifton  <nickc@redhat.com>

	PR 26141
	* config/tc-arm.c (arm_force_relocation): Force resolution of
	BFD_RELOC_THUMB_PCREL_BRANCH12 relocations.
	* testsuite/gas/arm/plt-1.d: Adjust expected disassembly.

2020-06-25  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (md_assemble): Move call to process_immext()
	...
	(process_operands): ... here.

2020-06-25  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_suffix): Skip ambiguous operand size
	diagnostic when there is a sizing prefix.  Switch to word/dword/
	qword encoding when there is a sizing prefix and no (explicit or
	derived) suffix.
	(update_imm): Handle presence of a sizing prefix.
	* testsuite/gas/i386/noreg16-data32.d,
	testsuite/gas/i386/noreg32-data16.d,
	testsuite/gas/i386/noreg32-data16.e,
	testsuite/gas/i386/noreg64-data16.d,
	testsuite/gas/i386/noreg64-data16.e,
	testsuite/gas/i386/noreg64-rex64.d: New.
	* testsuite/gas/i386/i386.exp: Run new tests.
	* testsuite/gas/i386/noreg32.s, testsuite/gas/i386/noreg64.s:
	Introduce and use pfx* macros.
	* testsuite/gas/i386/noreg16.s: Likewise. Replace 32-bit
	addressing.
	* testsuite/gas/i386/noreg16.d: Adjust expectations.

2020-06-25  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/avx-16bit.d,
	testsuite/gas/i386/avx-scalar.d, testsuite/gas/i386/avx.d,
	testsuite/gas/i386/avx512f-16bit.d,
	testsuite/gas/i386/avx512f.d,
	testsuite/gas/i386/evex-lig256.d,
	testsuite/gas/i386/evex-lig512.d
	testsuite/gas/i386/evex-wig1.d, testsuite/gas/i386/katmai.d,
	testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg32.d,
	testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/simd.d,
	testsuite/gas/i386/sse2-16bit.d,
	testsuite/gas/i386/sse2.d, testsuite/gas/i386/sse2avx.d: Adjust
	expectations.

2020-06-25  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (md_assemble): Also reject explicit REX
	prefixes with VEX and alike encoded insns. Zap consumed bits
	from i.rex.
	(output_insn): Don't ignore REX prefix for VEX and alike
	encodings; abort() instead if encountered.
	* testsuite/gas/i386/x86-64-pseudos.s: Move REX-with-VEX cases
	...
	* testsuite/gas/i386/x86-64-pseudos-bad.s: ... here.
	* testsuite/gas/i386/x86-64-pseudos.d,
	testsuite/gas/i386/x86-64-pseudos-bad.l: Adjust expectations.

2020-06-25  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_operands): Translate explicit REX
	prefix into i.rex for SSE2AVX templates.
	(set_rex_vrex): New helper.
	(build_modrm_byte): Use it.
	* testsuite/gas/i386/x86-64-sse2avx.s: Add cases with explict
	REX prefixes.
	* testsuite/gas/i386/x86-64-sse2avx.d: Adjust expectations.

2020-06-25  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (cpu_flags_match): Only match SSE2AVX
	templates when there's no data size prefix.
	(md_assemble): Reject data size prefix also for legacy encoded
	SIMD templates.
	* testsuite/gas/i386/prefix32.s, testsuite/gas/i386/prefix64.s:
	Uncomment previously not working line.
	* testsuite/gas/i386/sse2avx.s: Add ldmxcsr/stmxcsr cases with
	data16 prefix.
	* testsuite/gas/i386/prefix32.l, testsuite/gas/i386/prefix64.l,
	testsuite/gas/i386/sse2avx.d: Adjust expectations.

2020-06-25  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (build_evex_prefix): Drop early setting of
	vec_length.

2020-06-23  Nelson Chu  <nelson.chu@sifive.com>

	* config/tc-riscv.c (explicit_priv_attr): Rename explicit_csr to
	explicit_priv_attr.  It used to indicate CSR or priv instructions are
	explictly used.
	(riscv_is_priv_insn): Return True if it is a privileged instruction.
	(riscv_ip): Call riscv_is_priv_insn to check whether the instruction
	is privileged or not.  If it is, then set explicit_priv_attr to TRUE.
	(riscv_write_out_attrs): Clarification of when to generate the elf
	priv spec attributes.
	* testsuite/gas/riscv/attribute-11.s: Add comments.
	* testsuite/gas/riscv/attribute-14.s: New testcase.  Use symbol
	`priv_insn_<n>` to decide which priv instruction is expected to used.
	(<n> is a to e.)
	* testsuite/gas/riscv/attribute-14a.d: Likewise.
	* testsuite/gas/riscv/attribute-14b.d: Likewise.
	* testsuite/gas/riscv/attribute-14c.d: Likewise.
	* testsuite/gas/riscv/attribute-14d.d: Likewise.
	* testsuite/gas/riscv/attribute-14e.d: Likewise.

2020-06-22  Nelson Chu  <nelson.chu@sifive.com>

	* config/tc-riscv.c (buf_size, buf): Remove the unused variables.
	(riscv_set_default_priv_spec): Get the priv spec version from the
	priv spec attributes by riscv_get_priv_spec_class_from_numbers.

2020-06-20  Alan Modra  <amodra@gmail.com>

	* configure.tgt: Set bfd_gas for all SH targets.

2020-06-18  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/arch-13.s: Add alternative VMGEXIT case.
	* testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
	expectations.

2020-06-16  Lili Cui  <lili.cui@intel.com>

	* config/tc-i386.c (cpu_arch): Correct noavx512_vp2intersect
	cpu_arch to CPU_ANY_VP2INTERSECT_FLAGS.
	* doc/c-i386.texi: Add avx512_vp2intersect.

2020-06-16  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (md_assemble): Drop SSE4a from SSE check
	conditional.
	* testsuite/gas/i386/sse-check.s: Adjust comment.
	* testsuite/gas/i386/sse-check-error.l,
	testsuite/gas/i386/sse-check-warn.e,
	testsuite/gas/i386/x86-64-sse-check-error.l: Adjust
	expectations.

2020-06-16  Alan Modra  <amodra@gmail.com>

	* config/tc-tic30.h: Remove OBJ_AOUT support.
	* configure.tgt: Delete tic30-*-*aout* entry.

2020-06-15  Max Filippov  <jcmvbkbc@gmail.com>

	* config/tc-xtensa.c (XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New
	macros.
	(elf32xtensa_abi): New declaration.
	(option_abi_windowed, option_abi_call0): New enum constants.
	(md_longopts): Add entries for --abi-windowed and --abi-call0.
	(md_parse_option): Add handlers for --abi-windowed and
	--abi-call0.
	(xtensa_add_config_info): Use xtensa_abi_choice instead of
	XSHAL_ABI to format ABI tag.
	* doc/as.texi (Target Xtensa options): Add --abi-windowed and
	--abi-call0 to the list of options.
	* doc/c-xtensa.texi: Add description for options --abi-windowed
	and --abi-call0.
	* testsuite/gas/xtensa/abi-call0.d: New test definition.
	* testsuite/gas/xtensa/abi-windowed.d: New test definition.
	* testsuite/gas/xtensa/abi.s: New test source.

2020-06-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/26115
	* testsuite/gas/i386/tsxldtrk.d: Replace xsuspldtrk with
	xsusldtrk.
	* testsuite/gas/i386/tsxldtrk.s: Likewise.
	* testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
	* testsuite/gas/i386/x86-64-tsxldtrk.s: Likewise.

2020-06-12  Nelson Chu  <nelson.chu@sifive.com>

	* testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Removed.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
	* testsuite/gas/riscv/priv-reg-version-1p9.d: Likewise.

2020-06-09  Seth Girvan  <snth@snthhacks.com>

	* doc/c-avr.texi: Improve wording.

2020-06-09  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/x86-64-pseudos-bad.s,
	testsuite/gas/i386/x86-64-pseudos-bad.l: New.

2020-06-09  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/prefix.s: Add bogus prefix-with-VEX/EVEX
	encoding tests.
	* testsuite/gas/i386/prefix.d: Adjust expectations.

2020-06-09  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/prefix.s: Add bogus REP / EVEX.W prefix
	with VEX/EVEX encoding tests.
	* testsuite/gas/i386/prefix.d: Adjust expectations.

2020-06-09  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_suffix): Restrict defaulting to 'q'
	suffix.
	* testsuite/gas/i386/noreg64.s: Add lcall/ljmp cases.
	* testsuite/gas/i386/noreg64.d: Adjust expectations.
	* testsuite/gas/i386/noreg-intel64.d,
	testsuite/gas/i386/noreg-intel64.l,
	testsuite/gas/i386/noreg-intel64.s: New.
	* testsuite/gas/i386/i386.exp: Run new tests.

2020-06-09  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (vex_encoding_error): New enumerator.
	(VEX_check_operands): Rename to VEX_check_encoding. Check
	for vex_encoding_error. Move Imm4 handling ...
	(check_VecOperands): ... here.
	(match_template): Call VEX_check_encoding when there are no
	operands. Split construct calling check_VecOperands and
	VEX_check_encoding (when there are operands).
	(check_register): Don't blindly set vex_encoding_evex.
	* testsuite/gas/i386/pseudos-bad.s,
	testsuite/gas/i386/pseudos-bad.l: New.
	* testsuite/gas/i386/i386.exp: Run new test.
	* testsuite/gas/i386/xmmhi64.s: Drop {vex2}.

2020-06-08  Alex Coplan  <alex.coplan@arm.com>

	* config/tc-arm.c (insns): Add dfb.
	* testsuite/gas/arm/dfb.d: New test.
	* testsuite/gas/arm/dfb.s: Input for test.

2020-06-08  Nick Clifton  <nickc@redhat.com>

	* testsuite/gas/cfi/cfi-i386-2.d: Skip for PE based targets.

2020-06-08  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (pi): Add checks for RegMask and RegBND.

2020-06-08  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (check_byte_reg): Drop dead conditional
	around as_bad().

2020-06-08  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (check_register): Split RegTR handling, to
	fail recognition also in 64-bit mode as well as with i586 or
	i686 explicitly enabled.
	* testsuite/gas/i386/x86_64.s: Add insns referencing tr<N>.
	* testsuite/gas/i386/x86_64-intel.d,
	testsuite/gas/i386/x86_64.d: Adjust expectations.

2020-06-08  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/cfi/cfi-i386-2.d: Adjust expectations.
	* testsuite/gas/cfi/cfi.exp: Run this test.

2020-06-08  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (parse_real_register): Add allow_pseudo_reg
	check to %st(N) parsing logic.
	* testsuite/gas/cfi/cfi-i386.s: Set "generic32" arch.

2020-06-08  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (bad_reg): New.
	(check_VecOperations, i386_att_operand, i386_parse_name): Check
	for it.
	(check_register): New, broken out from ...
	(parse_real_register): ... here. Call it.
	(parse_register): Call it, and error upon failure.
	* testsuite/gas/i386/equ-bad.s, testsuite/gas/i386/equ-bad.l,
	testsuite/gas/i386/x86-64-equ-bad.s,
	testsuite/gas/i386/x86-64-equ-bad.l: New.
	* testsuite/gas/i386/i386.exp: Run new tests.

2020-06-06  Alan Modra  <amodra@gmail.com>

	* config/tc-ppc.c (md_show_usage): Mention -mpower10 and -mpwr10.
	* doc/c-ppc.texi: Likewise.

2020-06-06  Alan Modra  <amodra@gmail.com>

	* config/tc-ppc.c: Update throughout for reloc renaming.

2020-06-05  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-bpf.c (md_apply_fix): Avoid GCC 10 warning
	stringop-overflow.

2020-06-05  Nelson Chu  <nelson.chu@sifive.com>

	* config/tc-riscv.c (explicit_csr): New static boolean.
	Used to indicate CSR are explictly used.
	(riscv_ip): Set explicit_csr to TRUE if any CSR is used.
	(riscv_write_out_attrs): If we already have set elf priv
	attributes, then generate them.  Otherwise, don't generate
	them when no CSR are used.
	* testsuite/gas/riscv/attribute-01.d: Remove the priv attributes.
	* testsuite/gas/riscv/attribute-02.d: Likewise.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-04.d: Likewise.
	* testsuite/gas/riscv/attribute-05.d: Likewise.
	* testsuite/gas/riscv/attribute-06.d: Likewise.
	* testsuite/gas/riscv/attribute-07.d: Likewise.
	* testsuite/gas/riscv/attribute-08.d: Likewise.
	* testsuite/gas/riscv/attribute-09.d: Likewise.
	* testsuite/gas/riscv/attribute-10.d: Likewise.
	* testsuite/gas/riscv/attribute-unknown.d: Likewise.
	* testsuite/gas/riscv/attribute-11.s: New testcase.
	* testsuite/gas/riscv/attribute-11.d: New testcase.  The CSR is
	used, so we should output the ELF priv attributes.
	* testsuite/gas/riscv/attribute-12.d: New testcase.  The CSR is
	used, so output the priv attributes according to the -mpriv-spec.
	* testsuite/gas/riscv/attribute-13.d: New testcase.  The CSR isn't
	used, so ignore the -mpriv-spec setting.

2020-06-04  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-ip2k. (ip2k_apply_fix): Pass endianness to
	cgen_get_insn_value.
	* config/tc-xstormy16.c (xstormy16_md_apply_fix): Pass
	endianness to cgen_get_insn_value and cgen_put_insn_value.

2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-bpf.c (md_apply_fix): Simplify and avoid using
	cgen_put_insn_value.

2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/tc-bpf.c (md_begin): Pass CGEN_CPU_OPEN_INSN_ENDIAN to
	bpf_cgen_cpu_open.
	(md_assemble): Remove no longer needed hack.

2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* cgen.c (gas_cgen_finish_insn): Pass the endianness to
	cgen_put_insn_value.
	(gas_cgen_md_apply_fix): Likewise.
	(gas_cgen_md_apply_fix): Likewise.
	* config/tc-bpf.c (md_apply_fix): Pass data endianness to
	cgen_put_insn_value.
	* config/tc-mep.c (mep_check_ivc2_scheduling): Pass endianness to
	cgen_put_insn_value.

2020-06-04  Alan Modra  <amodra@gmail.com>

	* testsuite/config/default.exp: Remove global directive outside
	proc body.
	* testsuite/gas/mep/complex-relocs.exp: Likewise.
	* testsuite/gas/microblaze/relax_size.exp: Likewise.
	* testsuite/gas/microblaze/reloc_sym.exp: Likewise.
	* testsuite/gas/mt/relocs.exp: Likewise.
	* testsuite/gas/rx/rx.exp: Likewise.

2020-06-03  Stephen Casner  <casner@acm.org>

	* doc/c-riscv.texi (RISC-V-Options): Fix non-ASCII apostrophe.

2020-06-02  Frédéric Pétrot  <frederic.petrot@univ-grenoble-alpes.fr>
	    Jim Wilson  <jimw@sifive.com>

	PR 26051
	* doc/c-riscv.texi (RISC-V-Formats): Add missing I format using
	simm12(rs1).  Correct S format to use simm12(rs1).  Drop SB and B
	formats using simm12(rs1).  Correct SB and B to use rs1 and rs2.
	Move B before SB.  Move J before UJ.

2020-06-01  Alex Coplan  <alex.coplan@arm.com>

	* write.c (relax_segment): Fix handling of negative offset when
	relaxing an rs_org frag.
	* testsuite/gas/aarch64/org-neg.d: New test.
	* testsuite/gas/aarch64/org-neg.l: Error output for test.
	* testsuite/gas/aarch64/org-neg.s: Input for test.
	* testsuite/gas/arm/org-neg.d: New test.
	* testsuite/gas/arm/org-neg.l: Error output for test.
	* testsuite/gas/arm/org-neg.s: Input for test.

2020-05-28  Stephen Casner  <casner@acm.org>

	Fix unexpected failures in gas testsuite for pdp11-aout target.
	These are caused by the PDP11's mix of little-endian octets in
	shorts but shorts in big endian order for long or quad.

	* config/tc-pdp11.c (md_number_to_chars): Implement .quad
	* testsuite/gas/all/gas.exp: Select alternate test scripts for
	pdp11, skip octa test completely.
	* testsuite/gas/all/eqv-dot-pdp11.s: Identical to eqv-dot.s
	* testsuite/gas/all/eqv-dot-pdp11.d: Match different octet order.
	* testsuite/gas/all/cond-pdp11.l: Match different octet order.

2020-05-28  Alex Coplan  <alex.coplan@arm.com>

	* frags.c (frag_grow): Fix comment.

2020-05-27  Stephen Casner  <casner@acm.org>

	PR gas/26001
	* config/tc-pdp11.c (parse_reg): Distinguish register names from
	symbols that begin with a register name.
	* testsuite/gas/pdp11/pdp11.exp: Add test of such symbols.
	* testsuite/gas/pdp11/pr26001.s: Likewise.
	* testsuite/gas/pdp11/pr26001.d: Likewise.

2020-05-27  Simon Cook  <simon.cook@embecosm.com>

        * config/tc-riscv.c (riscv_init_csr_hash): NULL initilize next
        pointer when creating struct riscv_csr_extra.

2020-05-26  H.J. Lu  <hongjiu.lu@intel.com>

	* testsuite/gas/i386/align-branch-9.d: Updated for PECOFF.
	* testsuite/gas/i386/inval-avx512f.s: Add .p2align for PECOFF.
	* testsuite/gas/i386/inval-avx512f.l: Updated.

2020-05-26  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* testsuite/gas/s390/zarch-z13.d: Add regexp checks for vector
	load/store instruction variants with alignment hints.
	* testsuite/gas/s390/zarch-z13.s: Emit new vector load/store
	instruction variants with alignment hints.

2020-05-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/26044
	* config/tc-xgate.c (md_apply_fix): Check BFD_RELOC_XGATE_PCREL_X
	instead of R_XGATE_PCREL_X.
	(xgate_parse_operand): Replace R_XGATE_PCREL_X with
	BFD_RELOC_XGATE_PCREL_X.

2020-05-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/26044
	* config/tc-visium.c (md_convert_frag): Replace fragP->fr_literal
	with &fragP->fr_literal[0].

2020-05-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/26044
	* config/tc-vax.c (md_estimate_size_before_relax): Replace
	fragP->fr_literal with &fragP->fr_literal[0].
	(md_convert_frag): Likewise.

2020-05-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/26044
	* config/tc-v850.c (md_convert_frag): Replace fragP->fr_literal
	with &fragP->fr_literal[0].

2020-05-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/26044
	* config/tc-crx.c (getreg_image): Change argument type to int.
	(md_convert_frag): Replace fragP->fr_literal with
	&fragP->fr_literal[0].

2020-05-26  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/26044
	* onfig/tc-score.c (s3_do_macro_bcmp): Replace overlapping
	sprintf with memmove.

2020-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-mcore.c (md_convert_frag): Replace fragP->fr_literal
	with &fragP->fr_literal[0].

2020-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/26041
	* config/tc-cr16.c (md_assemble): Use memmove to concatenate
	2 overlapping strings.

2020-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-cr16.c (md_convert_frag): Replace fragP->fr_literal
	with &fragP->fr_literal[0].

2020-05-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-csky.c (md_convert_frag): Replace fragp->fr_literal
	with &fragp->fr_literal[0].
	* config/tc-microblaze.c (md_apply_fix): Likewise.
	* config/tc-sh.c (md_convert_frag): Likewise.

2020-05-24  Jim Wilson  <jimw@sifive.com>

	PR 26025
	* config/tc-riscv.c (riscv_pre_output_hook): Change s type from const
	asection to segT.  New locals seg and subseg.  Call subseg_set before
	fix_new_exp.  Call subseg_set after loop to restore original values.

2020-05-21  Alan Modra  <amodra@gmail.com>

	* atof-generic.c: Replace "if (x) free (x)" with "free (x)"
	throughout.
	* config/obj-elf.c: Likewise.
	* config/tc-aarch64.c: Likewise.
	* config/tc-arm.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-nios2.c: Likewise.
	* config/tc-tic30.c: Likewise.
	* ecoff.c: Likewise.
	* read.c: Likewise.
	* stabs.c: Likewise.
	* symbols.c: Likewise.
	* testsuite/gas/all/test-gen.c: Likewise.

2020-05-20  Nelson Chu  <nelson.chu@sifive.com>

	* testsuite/gas/riscv/priv-reg-fail-read-only-01.s: Updated.
	* config/tc-riscv.c (default_arch_with_ext, default_isa_spec):
	Static variables which are used to set the ISA extensions. You can
	use -march (or ELF build attributes) and -misa-spec to set them,
	respectively.
	(ext_version_hash): The hash table used to handle the extensions
	with versions.
	(init_ext_version_hash): Initialize the ext_version_hash according
	to riscv_ext_version_table.
	(riscv_get_default_ext_version): The callback function of
	riscv_parse_subset_t.  According to the choosed ISA spec,
	get the default version for the specific extension.
	(riscv_set_arch): Set the callback function.
	(enum options, struct option md_longopts): Add new option -misa-spec.
	(md_parse_option): Do not call riscv_set_arch for -march.  We will
	call it later in riscv_after_parse_args.  Call riscv_get_isa_spec_class
	to set default_isa_spec class.
	(riscv_after_parse_args): Call init_ext_version_hash to initialize the
	ext_version_hash, and then call riscv_set_arch to set the architecture
	with versions according to default_arch_with_ext.
	* testsuite/gas/riscv/attribute-02.d: Set 0p0 as default version for
	x extensions.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-09.d: New testcase.  For i-ext, we
	already set it's version to 2p1 by march, so no need to use the default
	2p2 version.  For m-ext, we do not set the version by -march and ELF arch
	attribute, so set the default 2p0 to it.  For zicsr, it is not defined in
	ISA spec 2p2, so set 0p0 to it.
	* testsuite/gas/riscv/attribute-10.d: New testcase.  The version of
	zicsr is 2p0 according to ISA spec 20191213.
	* config/tc-riscv.c (DEFAULT_RISCV_ARCH_WITH_EXT)
	(DEFAULT_RISCV_ISA_SPEC): Default configure option settings.
	You can set them by configure options --with-arch and
	--with-isa-spec, respectively.
	(riscv_set_default_isa_spec): New function used to set the
	default ISA spec.
	(md_parse_option): Call riscv_set_default_isa_spec rather than
	call riscv_get_isa_spec_class directly.
	(riscv_after_parse_args): If the -isa-spec is not set, then we
	set the default ISA spec according to DEFAULT_RISCV_ISA_SPEC by
	calling riscv_set_default_isa_spec.
	* testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2.2, since
	the --with-isa-spec may be set to different ISA spec.
	* testsuite/gas/riscv/attribute-02.d: Likewise.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-04.d: Likewise.
	* testsuite/gas/riscv/attribute-05.d: Likewise.
	* testsuite/gas/riscv/attribute-06.d: Likewise.
	* testsuite/gas/riscv/attribute-07.d: Likewise.
	* configure.ac: Add configure options, --with-arch and
	--with-isa-spec.
	* configure: Regenerated.
	* config.in: Regenerated.
	* config/tc-riscv.c (default_priv_spec): Static variable which is
	used to check if the CSR is valid for the chosen privilege spec. You
	can use -mpriv-spec to set it.
	(enum reg_class): We now get the CSR address from csr_extra_hash rather
	than reg_names_hash.  Therefore, move RCLASS_CSR behind RCLASS_MAX.
	(riscv_init_csr_hashes): Only need to initialize one hash table
	csr_extra_hash.
	(riscv_csr_class_check): Change the return type to void.  Don't check
	the ISA dependency if -mcsr-check isn't set.
	(riscv_csr_version_check): New function.  Check and find the CSR address
	from csr_extra_hash, according to default_priv_spec.  Report warning
	for the invalid CSR if -mcsr-check is set.
	(reg_csr_lookup_internal): Updated.
	(reg_lookup_internal): Likewise.
	(md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed.
	(enum options, struct option md_longopts): Add new GAS option -mpriv-spec.
	(md_parse_option): Call riscv_set_default_priv_version to set
	default_priv_spec.
	(riscv_after_parse_args): If -mpriv-spec isn't set, then set the default
	privilege spec to the newest one.
	(enum riscv_csr_class, struct riscv_csr_extra): Move them to
	include/opcode/riscv.h.
	* testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want
	to check the ISA dependency for CSR, so fix the spec version by adding
	-mpriv-spec=1.11.
	* testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.  There are some
	version warnings for the test case.
	* gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case.
	Check whether the CSR is valid when privilege version 1.9 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case.
	Check whether the CSR is valid when privilege version 1.9.1 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case.
	Check whether the CSR is valid when privilege version 1.10 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case.
	Check whether the CSR is valid when privilege version 1.11 is choosed.
	* gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
	* config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Default configure option
	setting.  You can set it by configure option --with-priv-spec.
	(riscv_set_default_priv_spec): New function used to set the default
	privilege spec.
	(md_parse_option): Call riscv_set_default_priv_spec rather than
	call riscv_get_priv_spec_class directly.
	(riscv_after_parse_args): If -mpriv-spec isn't set, then we set the
	default privilege spec according to DEFAULT_RISCV_PRIV_SPEC by
	calling riscv_set_default_priv_spec.
	* testsuite/gas/riscv/csr-dw-regnums.d: Add -mpriv-spec=1.11, since
	the --with-priv-spec may be set to different privilege spec.
	* testsuite/gas/riscv/priv-reg.d: Likewise.
	* configure.ac: Add configure option --with-priv-spec.
	* configure: Regenerated.
	* config.in: Regenerated.
	* config/tc-riscv.c (explicit_attr): Rename explicit_arch_attr to
	explicit_attr.  Set it to TRUE if any ELF attribute is found.
	(riscv_set_default_priv_spec): Try to set the default_priv_spec if
	the priv attributes are set.
	(md_assemble): Set the default_priv_spec according to the priv
	attributes when we start to assemble instruction.
	(riscv_write_out_attrs): Rename riscv_write_out_arch_attr to
	riscv_write_out_attrs.  Update the arch and priv attributes.  If we
	don't set the corresponding ELF attributes, then try to output the
	default ones.
	(riscv_set_public_attributes): If any ELF attribute or -march-attr
	options is set (explicit_attr is TRUE), then call riscv_write_out_attrs
	to update the arch and priv attributes.
	(s_riscv_attribute): Make sure all arch and priv attributes are set
	before any instruction.
	* testsuite/gas/riscv/attribute-01.d: Update the priv attributes if any
	ELF attribute or -march-attr is set.  If the priv attributes are not
	set, then try to update them by the default setting (-mpriv-spec or
	--with-priv-spec).
	* testsuite/gas/riscv/attribute-02.d: Likewise.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-04.d: Likewise.
	* testsuite/gas/riscv/attribute-06.d: Likewise.
	* testsuite/gas/riscv/attribute-07.d: Likewise.
	* testsuite/gas/riscv/attribute-08.d: Likewise.
	* testsuite/gas/riscv/attribute-09.d: Likewise.
	* testsuite/gas/riscv/attribute-10.d: Likewise.
	* testsuite/gas/riscv/attribute-unknown.d: Likewise.
	* testsuite/gas/riscv/attribute-05.d: Likewise.  Also, the priv spec
	set by priv attributes must be supported.
	* testsuite/gas/riscv/attribute-05.s: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Likewise.  Updated
	priv attributes according to the -mpriv-spec option.
	* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise.
	* testsuite/gas/riscv/priv-reg.d: Removed.
	* testsuite/gas/riscv/priv-reg-version-1p9.d: New test case.  Dump the
	CSR according to the priv spec 1.9.
	* testsuite/gas/riscv/priv-reg-version-1p9p1.d: New test case.  Dump the
	CSR according to the priv spec 1.9.1.
	* testsuite/gas/riscv/priv-reg-version-1p10.d: New test case.  Dump the
	CSR according to the priv spec 1.10.
	* testsuite/gas/riscv/priv-reg-version-1p11.d: New test case.  Dump the
	CSR according to the priv spec 1.11.
	* config/tc-riscv.c (md_show_usage): Add descriptions about
	the new GAS options.
	* doc/c-riscv.texi: Likewise.

2020-05-19  Peter Bergner  <bergner@linux.ibm.com>

	* testsuite/gas/ppc/power9.s <dcbf, dcbfl, dcbflp>: Add tests.
	* testsuite/gas/ppc/power9.d: Likewise.
	* testsuite/gas/ppc/power10.s <dcbf, dcbfps, dcbstps, hwsync, lwsync,
	pause_short, phwsync, plwsync, ptesync, stcisync, stncisync, stsync,
	sync, wait, waitrsv>: Add tests.
	* testsuite/gas/ppc/power10.d: Likewise.

2020-05-19  Alexander Fedotov  <alfedotov@gmail.com>

	PR 25992
	* config/tc-arm.c : Add arm_ext_v8r feature.
	(it_fsm_post_encode): Check arm_ext_v8r feature.
	(get_aeabi_cpu_arch_from_fset): Check arm_ext_v8r feature.

2020-05-19  Alan Modra  <amodra@gmail.com>

	* write.c (write_contents): Use bfd_get_filename rather than
	accessing bfd->filename directly.  Use bfd_section_name rather
	than accessing section->name directly.

2020-05-19  Alan Modra  <amodra@gmail.com>

	* symbols.c (local_symbol_make): Init all of lsy_flags.

2020-05-18  Alan Modra  <amodra@gmail.com>

	* symbols.c (resolve_symbol_value): Invoke LOCAL_SYMBOL_CHECK
	before looking at add_symbol->sy_flags.

2020-05-18  Hongtao Liu  <hongtao.liu@intel.com>

	* config/tc-i386.c: Not handle lret/iret.
	* testsuite/gas/i386/lfence-ret-a.d: Adjust testcase.
	* testsuite/gas/i386/lfence-ret-b.d: Ditto.
	* testsuite/gas/i386/lfence-ret-c.d: Ditto.
	* testsuite/gas/i386/lfence-ret-d.d: Ditto.
	* testsuite/gas/i386/lfence-ret.s: Ditto.
	* testsuite/gas/i386/x86-64-lfence-ret-a.d: Ditto.
	* testsuite/gas/i386/x86-64-lfence-ret-b.d: Ditto.
	* testsuite/gas/i386/x86-64-lfence-ret-c.d: Ditto.
	* testsuite/gas/i386/x86-64-lfence-ret-d.d: Ditto.
	* testsuite/gas/i386/x86-64-lfence-ret-e.d: Ditto.
	* testsuite/gas/i386/x86-64-lfence-ret.s: Ditto.
	* testsuite/gas/i386/x86-64-lfence-ret.e: Deleted.

2020-05-15  Alan Modra  <amodra@gmail.com>
	    Alex Coplan  <alex.coplan@arm.com>

	* symbols.c (struct local_symbol): Update comment.
	(resolve_symbol_value): For resolved symbols equated to other
	symbols, verify that the referenced symbol is not a local_symbol
	before accessing sy_value.  Don't leave symbol loops during
	finalize_syms resolution.
	* testsuite/gas/all/assign-bad-recursive.d: New test.
	* testsuite/gas/all/assign-bad-recursive.l: Error output for test.
	* testsuite/gas/all/assign-bad-recursive.s: Assembly for test.
	* testsuite/gas/all/gas.exp: Run it.

2020-05-14  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/scalarquad.d,
	* testsuite/gas/ppc/scalarquad.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/rightmost.d,
	* testsuite/gas/ppc/rightmost.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/xvtlsbb.d,
	* testsuite/gas/ppc/xvtlsbb.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/stringop.d,
	* testsuite/gas/ppc/stringop.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Peter Bergner  <bergner@linux.ibm.com>

	* testsuite/gas/ppc/set_bool.d,
	* testsuite/gas/ppc/set_bool.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/bitmanip.d,
	* testsuite/gas/ppc/bitmanip.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/genpcv.d,
	* testsuite/gas/ppc/genpcv.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/maskmanip.d,
	* testsuite/gas/ppc/maskmanip.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>
	    Peter Bergner  <bergner@linux.ibm.com>

	* config/tc-ppc.c (pre_defined_registers): Add accumulators.
	(md_assemble): Check acc specified in correct operand.
	* testsuite/gas/ppc/outerprod.d,
	* testsuite/gas/ppc/outerprod.s,
	* testsuite/gas/ppc/vsx4.d,
	* testsuite/gas/ppc/vsx4.s: New tests.
	* testsuite/gas/ppc/ppc.exp: Run them.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/simd_perm.d,
	* testsuite/gas/ppc/simd_perm.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/int128.d,
	* testsuite/gas/ppc/int128.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/vsx_32byte.d,
	* testsuite/gas/ppc/vsx_32byte.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/ppc/vec_mul.s,
	* testsuite/gas/ppc/vec_mul.d: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Peter Bergner  <bergner@linux.ibm.com>

	* testsuite/gas/ppc/byte_rev.d,
	* testsuite/gas/ppc/byte_rev.s: New test.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Peter Bergner  <bergner@linux.ibm.com>

	* testsuite/gas/ppc/power10.d: Add paste. tests.
	* testsuite/gas/ppc/power10.s: Likewise.

2020-05-11  Peter Bergner  <bergner@linux.ibm.com>

	* testsuite/gas/ppc/power10.s: New test.
	* testsuite/gas/ppc/power10.d: Likewise.
	* testsuite/gas/ppc/ppc.exp: Run it.

2020-05-11  Alan Modra  <amodra@gmail.com>

	* config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
	renaming.
	* testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
	place of -mfuture/-Mfuture.
	* testsuite/gas/ppc/prefix-pcrel.d: Likewise.
	* testsuite/gas/ppc/prefix-reloc.d: Likewise.

2020-05-06  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2020-05-06  Nick Clifton  <nickc@redhat.com>

	PR 25927
	* doc/as.texi (Preprocessing): Replace cross reference to not
	existant document with a URL to the equivalent page in the GCC
	manual.

2020-05-05  Nick Clifton  <nickc@redhat.com>

	* dwarf2dbg.c (out_dir_and_file_list): Add comments describing the
	construction of a DWARF-5 directory name table.
	* testsuite/gas/elf/pr25917.d: Update expected output.

2020-05-05  Gunther Nikl <gnikl@justmail.de>

	* config/tc-rx.c (elf_flags): Initialize for non-linux targets.
	(md_parse_option): Remove initialization of elf_flags.

2020-05-04  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR gas/25863
	* config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul.
	* testsuite/gas/arm/mve-scalar-vmult-it.d: New test.
	* testsuite/gas/arm/mve-scalar-vmult-it.s: New test.

2020-05-04  Nick Clifton  <nickc@redhat.com>

	PR 25917
	* dwarf2dbg.c (out_dir_and_file_list): Check for the directory
	table's existence before looking at its entries.
	Also do not emit a default directory entry if there are no
	directories in use.

	* testsuite/gas/elf/pr25917.s: New test source file.
	* testsuite/gas/elf/pr25917.d: New test driver.
	* testsuite/gas/elf/elf.exp (run_elf_list_test): Run the new test.

2020-04-30  Alex Coplan  <alex.coplan@arm.com>

	* config/tc-aarch64.c (fix_insn): Implement for
	AARCH64_OPND_UNDEFINED.
	(parse_operands): Implement for AARCH64_OPND_UNDEFINED.
	* testsuite/gas/aarch64/udf.s: New.
	* testsuite/gas/aarch64/udf.d: New.
	* testsuite/gas/aarch64/udf-invalid.s: New.
	* testsuite/gas/aarch64/udf-invalid.l: New.
	* testsuite/gas/aarch64/udf-invalid.d: New.

2020-04-30  Yoshinori Sato <ysato@users.sourceforge.jp>

	* config/tc-rx.c (elf_flags): Reset default value.
	(md_parse_option): For rx-elf Initialize elf_flags with RX_ABI.

2020-04-29  Max Filippov  <jcmvbkbc@gmail.com>

	* config/tc-xtensa.c (XTENSA_MARCH_EARLIEST): Define macro as 0
	if it's not defined.
	(microarch_earliest): New static variable.
	(xg_translate_idioms): Translate "simcall" to "simcall 0" when
	simcall opcode has mandatory parameter.
	(xg_init_global_config): Initialize microarch_earliest.

2020-04-29  Nick Clifton  <nickc@redhat.com>

	PR 22699
	* config/tc-sh.c (build_Mytes): Change operand type IMM0_8 to
	IMM0_8S and add support for IMM0_8U.
	* testsuite/gas/sh/sh4a.s: Add test of a logical insn using an
	unsigned 8-bit immediate.
	* testsuite/gas/sh/sh4a.d: Extended expected disassembly.
	* testsuite/gas/sh/sh4al-dsp.d: Update expected disassembly.

2020-04-27  Tamar Christina  <tamar.christina@arm.com>

	* NEWS: Add news entry for big-obj.
	* config/tc-i386.c (i386_target_format): Support new format.
	* doc/c-i386.texi: Add i386 support.
	* testsuite/gas/pe/big-obj.d: Rename test to not be x64 specific.
	* testsuite/gas/pe/pe.exp (big-obj): Make test run on i386 as well.

2020-04-27  Nick Clifton  <nickc@redhat.com>

	PR 25878
	* dwarf2dbg.c (struct file_entry): Add auto_assigned field.
	(assign_file_to_slot): New function.  Fills in an entry in the
	files table.
	(allocate_filenum): Use new function.
	(allocate_filename_to_slot): Use new function.  If the specified
	slot entry is already in use, but was chosen automatically then
	reassign the automatic entry.

2020-04-26  Hongtao Liu  <hongtao.liu@intel.com

	* config/tc-i386.c (lfence_before_ret_shl): New member.
	(load_insn_p): implict load for POP/POPA/POPF/XLATB, no load
	for Anysize insns.
	(insert_after_load): Issue warning for REP CMPS/SCAS.
	(insert_before_before): Handle iret, Handle
	-mlfence-before-ret=shl, Adjust operand size of or/not/shl to ret's,
	(md_parse_option): Change -mlfence-before-ret=[none|not|or] to
	-mlfence-before-ret=[none/not/or/shl/yes].
	Enable -mlfence-before-ret=shl when
	-mlfence-beofre-indirect-branch=all and no explict -mlfence-before-ret option.
	(md_show_usage): Ditto.
	* doc/c-i386.texi: Ditto.
	* testsuite/gas/i386/i386.exp: Add new testcases.
	* testsuite/gas/i386/lfence-load-b.d: New.
	* testsuite/gas/i386/lfence-load-b.e: New.
	* testsuite/gas/i386/lfence-load.d: Modified.
	* testsuite/gas/i386/lfence-load.e: New.
	* testsuite/gas/i386/lfence-load.s: Modified.
	* testsuite/gas/i386/lfence-ret-a.d: Modified.
	* testsuite/gas/i386/lfence-ret-b.d: Modified.
	* testsuite/gas/i386/lfence-ret-c.d: New.
	* testsuite/gas/i386/lfence-ret-d.d: New.
	* testsuite/gas/i386/lfence-ret.s: Modified.
	* testsuite/gas/i386/x86-64-lfence-load-b.d: New.
	* testsuite/gas/i386/x86-64-lfence-load.d: Modified.
	* testsuite/gas/i386/x86-64-lfence-load.s: Modified.
	* testsuite/gas/i386/x86-64-lfence-ret-a.d: Modified.
	* testsuite/gas/i386/x86-64-lfence-ret-b.d: Modified.
	* testsuite/gas/i386/x86-64-lfence-ret-c.d: New.
	* testsuite/gas/i386/x86-64-lfence-ret-d.d: New
	* testsuite/gas/i386/x86-64-lfence-ret-e.d: New.
	* testsuite/gas/i386/x86-64-lfence-ret.e: New.
	* testsuite/gas/i386/x86-64-lfence-ret.s: New.

2020-04-22  Max Filippov  <jcmvbkbc@gmail.com>

	PR ld/25861
	* config/tc-xtensa.c (md_apply_fix): Replace
	BFD_RELOC_XTENSA_DIFF{8,16,32} generation with
	BFD_RELOC_XTENSA_PDIFF{8,16,32} and
	BFD_RELOC_XTENSA_NDIFF{8,16,32} generation.
	* testsuite/gas/xtensa/loc.d: Replace BFD_RELOC_XTENSA_DIFF16
	with BFD_RELOC_XTENSA_PDIFF16 in the expected output.

2020-04-22  Alan Modra  <amodra@gmail.com>

	* config/obj-elf.c (elf_frob_symbol): Unconditionally remove
	symbol for ".symver .. remove".
	* doc/as.texi (.symver): Update.
	* testsuite/gas/symver/symver11.s: Make foo weak.
	* testsuite/gas/symver/symver11.d: Expect an error.
	* testsuite/gas/symver/symver7.d: Allow other random symbols.

2020-04-21  H.J. Lu  <hongjiu.lu@intel.com>

	* testsuite/gas/symver/symver11.s: Add ".balign 8".

2020-04-21  Andreas Schwab  <schwab@linux-m68k.org>

	PR 25848
	* testsuite/gas/m68k/operands.s: Add tests for cmpi.
	* testsuite/gas/m68k/operands.d: Update.
	* testsuite/gas/m68k/op68000.d: Update for new error messages.

2020-04-21  Tamar Christina  <tamar.christina@arm.com>

	PR binutils/24753
	* testsuite/gas/arm/pr24753.d: New test.
	* testsuite/gas/arm/pr24753.s: New test.

2020-04-21  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/23840
	PR gas/25295
	* NEWS: Mention .symver extension.
	* config/obj-elf.c (obj_elf_find_and_add_versioned_name): New
	function.
	(obj_elf_symver): Call obj_elf_find_and_add_versioned_name to
	add a version name.  Add local, hidden and remove visibility
	support.
	(elf_frob_symbol): Handle the list of version names.  Update the
	original symbol to local, hidden or remove it from the symbol
	table.
	(elf_frob_file_before_adjust): Handle the list of version names.
	* config/obj-elf.h (elf_visibility): New.
	(elf_versioned_name_list): Likewise.
	(elf_obj_sy): Change local to bitfield. Add rename, bad_version
	and visibility.  Change versioned_name pointer to struct
	elf_versioned_name_list.
	* doc/as.texi: Update .symver directive.
	* testsuite/gas/symver/symver.exp: Run all *.d tests.  Add more
	error checking tests.
	* testsuite/gas/symver/symver6.d: New file.
	* testsuite/gas/symver/symver7.d: Likewise.
	* testsuite/gas/symver/symver7.s: Likewise.
	* testsuite/gas/symver/symver8.d: Likewise.
	* testsuite/gas/symver/symver8.s: Likewise.
	* testsuite/gas/symver/symver9.s: Likewise.
	* testsuite/gas/symver/symver9a.d: Likewise.
	* testsuite/gas/symver/symver9b.d: Likewise.
	* testsuite/gas/symver/symver10.s: Likewise.
	* testsuite/gas/symver/symver10a.d: Likewise.
	* testsuite/gas/symver/symver10b.d: Likewise.
	* testsuite/gas/symver/symver11.d: Likewise.
	* testsuite/gas/symver/symver11.s: Likewise.
	* testsuite/gas/symver/symver12.d: Likewise.
	* testsuite/gas/symver/symver12.s: Likewise.
	* testsuite/gas/symver/symver13.d: Likewise.
	* testsuite/gas/symver/symver13.s: Likewise.
	* testsuite/gas/symver/symver14.d: Likewise.
	* testsuite/gas/symver/symver14.l: Likewise.
	* testsuite/gas/symver/symver15.d: Likewise.
	* testsuite/gas/symver/symver15.l: Likewise.
	* testsuite/gas/symver/symver6.l: Removed.
	* testsuite/gas/symver/symver6.s: Updated.

2020-04-20  Sudakshina Das  <sudi.das@arm.com>

	* config/tc-aarch64.c (parse_barrier_psb): Update error messages
	to include TSB.
	* testsuite/gas/aarch64/system-2.d: Update -march and new tsb tests.
	* testsuite/gas/aarch64/system-2.s: Add new tsb tests.
	* testsuite/gas/aarch64/system.d: Update.

2020-04-20  Sudakshina Das  <sudi.das@arm.com>

	* testsuite/gas/aarch64/bti.d: Update -march option.
	* testsuite/gas/aarch64/illegal-bti.d: Remove.
	* testsuite/gas/aarch64/illegal-bti.l: Remove.
	* testsuite/gas/aarch64/illegal-ras-1.l: Remove esb.
	* testsuite/gas/aarch64/illegal-ras-1.s: Remove esb.

2020-04-17  Alan Modra  <amodra@gmail.com>

	* config/tc-bfin.h (TC_EQUAL_IN_INSN): Allow assignment to dot.

2020-04-16  Gagan Singh Sidhu  <broly@mac.com>
	    Nick Clifton  <nickc@redhat.com>

	PR 25803
	* config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS
	targets.
	* testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip
	for the type-2 test.
	* testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS
	targets running this test.

2020-02-16  David Faust  <david.faust@oracle.com>

	* testsuite/gas/bpf/bpf.exp: Run jump32 tests.
	* testsuite/gas/bpf/jump32.s: New file.
	* testsuite/gas/bpf/jump32.d: Likewise.

2020-04-08  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/c-i386.texi: Correct -mlfence-before-indirect-branch=
	documentation.

2020-04-08  Gunther Nikl  <gnikl@justmail.de>

	* config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
	(md_pcrel_from): Remove prototytpe.
	* config/tc-m32c.h (MD_PCREL_FROM_SECTION): Delete duplicate
	define.
	(md_pcrel_from_section): Remove duplicate prototype.
	* tc.h (md_pcrel_from_section): Add prototype.
	* config/tc-aarch64.h (md_pcrel_from_section): Remove prototype.
	* config/tc-arc.h (md_pcrel_from_section): Likewise.
	* config/tc-arm.h (md_pcrel_from_section): Likewise.
	* config/tc-avr.h (md_pcrel_from_section): Likewise.
	* config/tc-bfin.h (md_pcrel_from_section): Likewise.
	* config/tc-bpf.h (md_pcrel_from_section): Likewise.
	* config/tc-csky.h (md_pcrel_from_section): Likewise.
	* config/tc-d10v.h (md_pcrel_from_section): Likewise.
	* config/tc-d30v.h (md_pcrel_from_section): Likewise.
	* config/tc-epiphany.h (md_pcrel_from_section): Likewise.
	* config/tc-fr30.h (md_pcrel_from_section): Likewise.
	* config/tc-frv.h (md_pcrel_from_section): Likewise.
	* config/tc-iq2000.h (md_pcrel_from_section): Likewise.
	* config/tc-lm32.h (md_pcrel_from_section): Likewise.
	* config/tc-m32c.h (md_pcrel_from_section): Likewise.
	* config/tc-m32r.h (md_pcrel_from_section): Likewise.
	* config/tc-mcore.h (md_pcrel_from_section): Likewise.
	* config/tc-mep.h (md_pcrel_from_section): Likewise.
	* config/tc-metag.h (md_pcrel_from_section): Likewise.
	* config/tc-microblaze.h (md_pcrel_from_section): Likewise.
	* config/tc-mmix.h (md_pcrel_from_section): Likewise.
	* config/tc-moxie.h (md_pcrel_from_section): Likewise.
	* config/tc-msp430.h (md_pcrel_from_section): Likewise.
	* config/tc-mt.h (md_pcrel_from_section): Likewise.
	* config/tc-or1k.h (md_pcrel_from_section): Likewise.
	* config/tc-ppc.h (md_pcrel_from_section): Likewise.
	* config/tc-rl78.h (md_pcrel_from_section): Likewise.
	* config/tc-rx.h (md_pcrel_from_section): Likewise.
	* config/tc-s390.h (md_pcrel_from_section): Likewise.
	* config/tc-sh.h (md_pcrel_from_section): Likewise.
	* config/tc-xc16x.h (md_pcrel_from_section): Likewise.
	* config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
	* config/tc-microblaze.h (md_begin, md_assemble, md_undefined_symbol,
	md_show_usage, md_convert_frag, md_operand, md_number_to_chars,
	md_estimate_size_before_relax, md_section_align, tc_gen_reloc,
	md_apply_fix3): Delete prototypes.

2020-04-07  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
	instructions.

2020-04-07  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/c-z80.texi: Fix @xref warnings.

2020-04-07  Lili Cui  <lili.cui@intel.com>

	* config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
	(cpu_noarch): Likewise.
	* doc/c-i386.texi: Document TSXLDTRK.
	* testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
	* testsuite/gas/i386/tsxldtrk.d: Likewise.
	* testsuite/gas/i386/tsxldtrk.s: Likewise.
	* testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.

2020-04-02  Lili Cui  <lili.cui@intel.com>

	* config/tc-i386.c (cpu_arch): Add .serialize.
	(cpu_noarch): Likewise.
	* doc/c-i386.texi: Document serialize.
	* testsuite/gas/i386/i386.exp: Run serialize tests
	* testsuite/gas/i386/serialize.d: Likewise.
	* testsuite/gas/i386/x86-64-serialize.d: Likewise.
	* testsuite/gas/i386/serialize.s: Likewise.

2020-04-02  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
	* testsuite/gas/elf/section12b.d: Likewise.
	* testsuite/gas/elf/section16a.d: Likewise.
	* testsuite/gas/elf/section16b.d: Likewise.

2020-04-02  Gunther Nikl  <gnikl@justmail.de>

	* config/tc-m68k.c (m68k_ip): Fix range check for index register
	with a suppressed address register.

2020-04-01  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/25756
	* config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
	* testsuite/gas/i386/localpic.s: Add a test for relocation
	against local absolute symbol.
	* testsuite/gas/i386/x86-64-localpic.s: Likewise.
	* testsuite/gas/i386/localpic.d: Updated.
	* testsuite/gas/i386/x86-64-localpic.d: Likewise.
	* testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.

2020-04-01  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR gas/25732
	* testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
	* testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
	* testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
	testsuite/gas/i386/x86-64-jump.d.
	* gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
	Incorporate changes to
	gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
	* testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
	changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
	* testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
	* testsuite/gas/i386/x86-64-branch-3.d: Likewise.

2020-03-31  Maciej W. Rozycki  <macro@linux-mips.org>

	PR 25611
	PR 25614
	* dwarf2dbg.c: Do not include "bignum.h".

2020-03-30  Nelson Chu  <nelson.chu@sifive.com>

	* testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
	* testsuite/gas/riscv/alias-csr.s: Likewise.
	* testsuite/gas/riscv/no-aliases-csr.d: Move this
	to priv-reg-pseudo-noalias.
	* testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
	* testsuite/gas/riscv/bad-csr.l: Likewise.
	* testsuite/gas/riscv/bad-csr.s: Likewise.
	* testsuite/gas/riscv/satp.d: Removed.  Already included in priv-reg.
	* testsuite/gas/riscv/satp.s: Likewise.
	* testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
	csr instruction, including alias-csr testcase.
	* testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
	* testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
	pseudo instruction with objdump -Mno-aliases.
	* testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
	* testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
	* testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
	* testsuite/gas/riscv/priv-reg.s: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr-dw-regnums.s: Likewise.

2020-03-25  J.W. Jagersma  <jwjagersma@gmail.com>

	* config/obj-coff.c (obj_coff_section): Set the bss flag on
	sections with the "b" attribute.

2020-03-22  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/s12z/truncated.d: Update expected output.

2020-03-17  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25690
	* config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
	* doc/c-z80.texi: Update documentation.

2020-03-17  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25641
	PR 25668
	PR 25633
	Fix disassembling ED+A4/AC/B4/BC opcodes.
	Fix assembling lines containing colonless label and instruction
	with first operand inside parentheses.
	Fix registration of unsupported by target CPU registers.
	* config/tc-z80.c: See above.
	* config/tc-z80.h: See above.
	* testsuite/gas/z80/colonless.d: Update test.
	* testsuite/gas/z80/colonless.s: Likewise.
	* testsuite/gas/z80/ez80_adl_all.d: Likewise.
	* testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
	* testsuite/gas/z80/ez80_z80_all.d: Likewise.
	* testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
	* testsuite/gas/z80/r800_unsup_regs.d: Likewise.
	* testsuite/gas/z80/unsup_regs.s: Likewise.
	* testsuite/gas/z80/z180_unsup_regs.d: Likewise.
	* testsuite/gas/z80/z80.exp: Likewise.
	* testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
	* testsuite/gas/z80/z80_unsup_regs.d: Likewise.
	* testsuite/gas/z80/z80n_unsup_regs.d: Likewise.

2020-03-13  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 25660
	*  config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
	(parse_operands): Handle new operand codes.
	(do_neon_dyadic_long): Make shape check accept the scalar variants.
	(asm_opcode_insns): Fix operand codes for vaddl and vsubl.
	* testsuite/gas/arm/mve-vaddsub-it.s: New test.
	* testsuite/gas/arm/mve-vaddsub-it.d: New test.
	* testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
	* testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
	* testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
	* testsuite/gas/arm/nomve-vaddsub-it.d: New test.

2020-03-11  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention x86 assembler options for CVE-2020-0551.

2020-03-11  H.J. Lu  <hongjiu.lu@intel.com>

	* testsuite/gas/i386/i386.exp: Run new tests.
	* testsuite/gas/i386/lfence-byte.d: New file.
	* testsuite/gas/i386/lfence-byte.e: Likewise.
	* testsuite/gas/i386/lfence-byte.s: Likewise.
	* testsuite/gas/i386/lfence-indbr-a.d: Likewise.
	* testsuite/gas/i386/lfence-indbr-b.d: Likewise.
	* testsuite/gas/i386/lfence-indbr-c.d: Likewise.
	* testsuite/gas/i386/lfence-indbr.e: Likewise.
	* testsuite/gas/i386/lfence-indbr.s: Likewise.
	* testsuite/gas/i386/lfence-load.d: Likewise.
	* testsuite/gas/i386/lfence-load.s: Likewise.
	* testsuite/gas/i386/lfence-ret-a.d: Likewise.
	* testsuite/gas/i386/lfence-ret-b.d: Likewise.
	* testsuite/gas/i386/lfence-ret.s: Likewise.
	* testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
	* testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
	* testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
	* testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
	* testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
	* testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
	* testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
	* testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
	* testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
	* testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
	* testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
	* testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.

2020-03-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (lfence_after_load): New.
	(lfence_before_indirect_branch_kind): New.
	(lfence_before_indirect_branch): New.
	(lfence_before_ret_kind): New.
	(lfence_before_ret): New.
	(last_insn): New.
	(load_insn_p): New.
	(insert_lfence_after): New.
	(insert_lfence_before): New.
	(md_assemble): Call insert_lfence_before and insert_lfence_after.
	Set last_insn.
	(OPTION_MLFENCE_AFTER_LOAD): New.
	(OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
	(OPTION_MLFENCE_BEFORE_RET): New.
	(md_longopts): Add -mlfence-after-load=,
	-mlfence-before-indirect-branch= and -mlfence-before-ret=.
	(md_parse_option): Handle -mlfence-after-load=,
	-mlfence-before-indirect-branch= and -mlfence-before-ret=.
	(md_show_usage): Display -mlfence-after-load=,
	-mlfence-before-indirect-branch= and -mlfence-before-ret=.
	(i386_cons_align): New.
	* config/tc-i386.h (i386_cons_align): New.
	(md_cons_align): New.
	* doc/c-i386.texi: Document -mlfence-after-load=,
	-mlfence-before-indirect-branch= and -mlfence-before-ret=.

2020-03-11  Nick Clifton  <nickc@redhat.com>

	PR 25611
	PR 25614
	* dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
	(DWARF2_FILE_SIZE_NAME): Default to -1.
	(DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
	whichever is higher.
	(DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
	(NUM_MD5_BYTES): Define.
	(struct file entry): Add md5 field.
	(get_filenum): Delete and replace with...
	(get_basename): New function.
	(get_directory_table_entry): New function.
	(allocate_filenum): New function.
	(allocate_filename_to_slot): New function.
	(dwarf2_where): Use new functions.
	(dwarf2_directive_filename): Add support for extended .file
	pseudo-op.
	(dwarf2_directive_loc): Allow the use of file number zero with
	DWARF 5 or higher.
	(out_file_list): Rename to...
	(out_dir_and_file_list): Add DWARF 5 support.
	(out_debug_line): Emit extra values into the section header for
	DWARF 5.
	(out_debug_str): Allow for file 0 to be used with DWARF 5.
	* doc/as.texi (.file): Update the description of this pseudo-op.
	* testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
	* testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
	* testsuite/gas/lns/lns-diag-1.l: Update expected error message.
	* NEWS: Mention the new feature.

2020-03-10  Alan Modra  <amodra@gmail.com>

	* config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
	to avoid signed overflow.
	* config/tc-mcore.c (md_assemble): Likewise.
	* config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
	* config/tc-nds32.c (SET_ADDEND): Likewise.
	* config/tc-nios2.c (nios2_assemble_arg_R): Likewise.

2020-03-09  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
	* testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
	testsuite/gas/i386/avx-intel.d: Adjust expectations.

2020-03-07  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
	first column.

2020-03-06  Nick Clifton  <nickc@redhat.com>

	PR 25614
	* dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
	0 if the dwarf_level is 5 or more.  Complain if a filename follows
	a file 0.
	* testsuite/gas/elf/dwarf-5-file0.s: New test.
	* testsuite/gas/elf/dwarf-5-file0.d: New test driver.
	* testsuite/gas/elf/elf.exp: Run the new test.

	PR 25612
	* config/tc-ia64.h (DWARF2_VERISION): Fix typo.
	* doc/as.texi: Fix another typo.

2020-03-06  Nick Clifton  <nickc@redhat.com>

	PR 25612
	* as.c (dwarf_level): Define.
	(show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
	(parse_args): Add support for the new options.
	as.h (dwarf_level): Prototype.
	* dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
	value.
	* config/tc-ia64.h (DWARF2_VERISION): Update definition.
	(DWARF2_LINE_VERSION): Remove definition.
	* doc/as.texi: Document the new options.

2020-03-06  Nick Clifton  <nickc@redhat.com>

	PR 25572
	* as.c (main): Allow matching input and outputs when they are
	not regular files.

2020-03-06  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (match_mem_size): Generalize broadcast special
	casing.
	(check_VecOperands): Zap xmmword/ymmword/zmmword when more than
	one of byte/word/dword/qword is set alongside a SIMD register in
	a template's operand.

2020-03-06  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (match_template): Extend code in logic
	rejecting certain suffixes in certain modes to also cover mask
	register use and VecSIB. Drop special casing of broadcast. Skip
	immediates in the check.

2020-03-06  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (match_template): Fold duplicate code in
	logic rejecting certain suffixes in certain modes. Drop
	pointless "else".

2020-03-06  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_suffix): Exlucde !vexw insns
	alongside !norex64 ones.
	* testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
	with both 32- and 64-bit GPR operands.
	* testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
	32- and 64-bit GPR operands.
	* testsuite/gas/i386/x86-64-avx512bw-intel.d,
	testsuite/gas/i386/x86-64-avx512bw.d,
	testsuite/gas/i386/x86-64-avx512f-intel.d,
	testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.

2020-03-06  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (md_assemble): Drop use of rex64.
	(process_suffix): For REX.W for 64-bit CRC32.

2020-03-06  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (i386_addressing_mode): For 32-bit
	addressing for MPX insns without base/index.
	* testsuite/gas/i386/mpx-16bit.s,
	* testsuite/gas/i386/mpx-16bit.d: New.
	* testsuite/gas/i386/i386.exp: Run new test.

2020-03-06  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
	testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
	testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
	testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
	* testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
	as well as a BSWAP one.
	* testsuite/gas/i386/rdpid.s: Add 16-bit case.
	* testsuite/gas/i386/sse2-16bit.s: Cover more insns.
	* testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
	testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
	testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
	testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
	testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
	testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
	testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
	testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
	testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
	testsuite/gas/i386/vmx.d: Adjust expectations.

2020-03-06  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (md_assemble): Also exclude tpause and umwait
	from having their operands swapped.
	* testsuite/gas/i386/waitpkg.s,
	testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
	3-operand cases as well as testing of 16-bit code generation.
	* testsuite/gas/i386/waitpkg.d,
	testsuite/gas/i386/waitpkg-intel.d,
	testsuite/gas/i386/x86-64-waitpkg.d,
	testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.

2020-03-04  Nelson Chu  <nelson.chu@sifive.com>

	* config/tc-riscv.c (percent_op_utype): Support the modifier
	%got_pcrel_hi.
	* doc/c-riscv.texi: Add documentation.
	* testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
	modifier %got_pcrel_hi.
	* testsuite/gas/riscv/no-relax-reloc.s: Likewise.
	* testsuite/gas/riscv/relax-reloc.d: Likewise.
	* testsuite/gas/riscv/relax-reloc.s: Likewise.

	* doc/c-riscv.texi (relocation modifiers): Add documentation.
	(RISC-V-Formats): Update the section name from "Instruction Formats"
	to "RISC-V Instruction Formats".

2020-03-04  Alexandre Oliva  <oliva@adacore.com>

	* config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
	detected in a section which does not have at least 4 byte
	alignment.
	* testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
	* testsuite/gas/arm/ldr-t.s: Likewise.
	* testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
	* testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
	disassembly, ignoring any NOPs that may have been inserted because
	of section alignment.
	* testsuite/gas/arm/ldr-t.d: Likewise.

2020-03-04  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (cpu_arch): Add .sev_es entry.
	* doc/c-i386.texi: Mention sev_es.
	* testsuite/gas/i386/arch-13.s: Add SEV-ES case.
	* testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
	expectations.
	* testsuite/gas/i386/arch-13-znver1.d,
	testsuite/gas/i386/arch-13-znver2.d: Extend -march=.

2020-03-03  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Replace ignoresize and
	defaultsize with mnemonicsize.
	(process_suffix): Likewise.

2020-03-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25627
	* config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
	instruction LD IY,(HL).
	* testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
	* testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
	* testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
	* testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.

2020-03-03  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/25622
	* testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
	x86-64-default-suffix-avx.
	* testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
	vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
	* testsuite/gas/i386/noreg64.d: Updated.
	* testsuite/gas/i386/noreg64.l: Likewise.
	* testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
	* testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
	* testsuite/gas/i386/x86-64-default-suffix.s: Likewise.

2020-03-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25604
	* config/tc-z80.c (contains_register): Prevent an illegal memory
	access when checking an expression for a register name.

2020-03-03  Alan Modra  <amodra@gmail.com>

	* config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
	support.

2020-03-02  Alan Modra  <amodra@gmail.com>

	* config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
	* config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
	and .sbss sections.
	* config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
	(s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
	(s3_s_score_lcomm): Likewise.
	* config/tc-score7.c: Similarly.
	* read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.

2020-02-28  YunQiang Su  <syq@debian.org>

	PR gas/25539
	* config/tc-mips.c (fix_loongson3_llsc): Compare label value
	to handle multi-labels.
	(has_label_name): New.

2020-02-26  Matthew Malcomson  <matthew.malcomson@arm.com>

	* config/tc-arm.c (enum pred_instruction_type): Remove
	NEUTRAL_IT_NO_VPT_INSN predication type.
	(cxn_handle_predication): Modify to require condition suffixes.
	(handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
	* testsuite/gas/arm/cde-scalar.s: Update test.
	* testsuite/gas/arm/cde-warnings.l: Update test.
	* testsuite/gas/arm/cde-warnings.s: Update test.

2020-02-26  Alan Modra  <amodra@gmail.com>

	* config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
	N_() on empty string.

2020-02-26  Alan Modra  <amodra@gmail.com>

	* read.c (read_a_source_file): Call strncpy with length one
	less than size of original_case_string.

2020-02-26  Alan Modra  <amodra@gmail.com>

	* config/obj-elf.c: Indent labels correctly.
	* config/obj-macho.c: Likewise.
	* config/tc-aarch64.c: Likewise.
	* config/tc-alpha.c: Likewise.
	* config/tc-arm.c: Likewise.
	* config/tc-cr16.c: Likewise.
	* config/tc-crx.c: Likewise.
	* config/tc-frv.c: Likewise.
	* config/tc-i386-intel.c: Likewise.
	* config/tc-i386.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-mn10200.c: Likewise.
	* config/tc-mn10300.c: Likewise.
	* config/tc-nds32.c: Likewise.
	* config/tc-riscv.c: Likewise.
	* config/tc-s12z.c: Likewise.
	* config/tc-xtensa.c: Likewise.
	* config/tc-z80.c: Likewise.
	* read.c: Likewise.
	* symbols.c: Likewise.
	* write.c: Likewise.

2020-02-20  Nelson Chu  <nelson.chu@sifive.com>

	* config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
	we are assembling instruction with CSR.  Call riscv_csr_read_only_check
	after parsing all arguments.
	(enum csr_insn_type): New enum is used to classify the CSR instruction.
	(riscv_csr_insn_type, riscv_csr_read_only_check): New functions.  These
	are used to check if we write a read-only CSR by the CSR instruction.
	* testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase.  Test
	all CSR for the read-only CSR checking.
	* testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase.  Test
	all CSR instructions for the read-only CSR checking.
	* testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.

	* config/tc-riscv.c (struct riscv_set_options): New field csr_check.
	(riscv_opts): Initialize it.
	(reg_lookup_internal): Check the `riscv_opts.csr_check`
	before doing the CSR checking.
	(enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
	(md_longopts): Add mcsr-check and mno-csr-check.
	(md_parse_option): Handle new enum option values.
	(s_riscv_option): Handle new long options.
	* doc/c-riscv.texi: Add description for the new .option and assembler
	options.
	* testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
	the CSR checking.
	* testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.

	* config/tc-riscv.c (csr_extra_hash): New.
	(enum riscv_csr_class): New enum.  Used to decide
	whether or not this CSR is legal in the current ISA string.
	(struct riscv_csr_extra): New structure to hold all extra information
	of CSR.
	(riscv_init_csr_hashes): New.  According to the DECLARE_CSR and
	DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
	Call hash_reg_name to insert CSR address into reg_names_hash.
	(reg_csr_lookup_internal, riscv_csr_class_check): New functions.
	Decide whether the CSR is valid according to the csr_extra_hash.
	(reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
	(init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
	not a boolean.  This is same as riscv_init_csr_hash, so keep the
	consistent usage.
	(md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
	* testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
	* testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
	* testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase.  The source
	file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
	f-ext CSR are not allowed.
	* testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
	* testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase.  The
	source file is `priv-reg.s`, and the ISA is rv64if, so the
	rv32-only CSR are not allowed.
	* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.

2020-02-21  Alan Modra  <amodra@gmail.com>

	* config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
	(tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.

2020-02-21  Alan Modra  <amodra@gmail.com>

	PR 25569
	* config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
	on section size adjustment, instead perform another write if
	exec header size is larger than section size.

2020-02-19  Nelson Chu  <nelson.chu@sifive.com>

	* doc/c-riscv.texi: Add the doc entries for -march-attr/
	-mno-arch-attr command line options.

2020-02-19  Nelson Chu  <nelson.chu@sifive.com>

	* testsuite/gas/riscv/c-add-addi.d: New testcase.
	* testsuite/gas/riscv/c-add-addi.s: Likewise.

2020-02-19  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25576
	* config/tc-z80.c (md_parse_option): Do not use an underscore
	prefix for local labels in SDCC compatability mode.
	(z80_start_line_hook): Remove SDCC dollar label support.
	* testsuite/gas/z80/sdcc.d: Update expected disassembly.
	* testsuite/gas/z80/sdcc.s: Likewise.

2020-02-19  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25517
	* config/tc-z80.c: Add -march option.
	* doc/as.texi: Update Z80 documentation.
	* doc/c-z80.texi: Likewise.
	* testsuite/gas/z80/ez80_adl_all.d: Update command line.
	* testsuite/gas/z80/ez80_adl_suf.d: Likewise.
	* testsuite/gas/z80/ez80_pref_dis.d: Likewise.
	* testsuite/gas/z80/ez80_z80_all.d: Likewise.
	* testsuite/gas/z80/ez80_z80_suf.d: Likewise.
	* testsuite/gas/z80/gbz80_all.d: Likewise.
	* testsuite/gas/z80/r800_extra.d: Likewise.
	* testsuite/gas/z80/r800_ii8.d: Likewise.
	* testsuite/gas/z80/r800_z80_doc.d: Likewise.
	* testsuite/gas/z80/sdcc.d: Likewise.
	* testsuite/gas/z80/z180.d: Likewise.
	* testsuite/gas/z80/z180_z80_doc.d: Likewise.
	* testsuite/gas/z80/z80_doc.d: Likewise.
	* testsuite/gas/z80/z80_ii8.d: Likewise.
	* testsuite/gas/z80/z80_in_f_c.d: Likewise.
	* testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
	* testsuite/gas/z80/z80_out_c_0.d: Likewise.
	* testsuite/gas/z80/z80_sli.d: Likewise.
	* testsuite/gas/z80/z80n_all.d: Likewise.
	* testsuite/gas/z80/z80n_reloc.d: Likewise.

2020-02-19  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
	with GNU_PROPERTY_X86_FEATURE_2_MMX.
	* testsuite/gas/i386/i386.exp: Run property-3 and
	x86-64-property-3.
	* testsuite/gas/i386/property-3.d: New file.
	* testsuite/gas/i386/property-3.s: Likewise.
	* testsuite/gas/i386/x86-64-property-3.d: Likewise.

2020-02-17  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .popcnt.
	* doc/c-i386.texi: Remove abm and .abm.  Add popcnt and .popcnt.
	Add a tab before @samp{.sse4a}.

2020-02-17  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_suffix): Don't try to guess a suffix
	for AddrPrefixOpReg templates. Combine the two pieces of
	addrprefixopreg handling. Reject 16-bit address reg in 64-bit
	mode.

2020-02-17  Jan Beulich  <jbeulich@suse.com>

	PR gas/14439
	* config/tc-i386.c (md_assemble): Also suppress operand
	swapping for MONITOR{,X} and MWAIT{,X}.
	* testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
	Add Intel syntax monitor/mwait tests.
	* testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
	Adjust expectations.
	*testsuite/gas/i386/sse3-intel.d,
	testsuite/gas/i386/x86-64-sse3-intel.d: New.
	* testsuite/gas/i386/i386.exp: Run new tests.

2020-02-17  Jan Beulich  <jbeulich@suse.com>

	PR gas/6518
	* config/tc-i386.c (process_suffix): Re-work Intel-syntax
	[XYZ]MMWord memory operand ambiguity recognition logic (largely
	re-indentation).
	* testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
	cases.
	* testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
	* testsuite/gas/i386/avx512dq-inval.l,
	testsuite/gas/i386/inval-avx.l,
	testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
	* testsuite/gas/i386/avx512vl-ambig.s,
	testsuite/gas/i386/avx512vl-ambig.l: New.
	* testsuite/gas/i386/i386.exp: Run new test.

2020-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a.  Restore
	nosse4.
	* doc/c-i386.texi: Document sse4a and nosse4a.

2020-02-14  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/c-i386.texi: Remove the old movsx and movzx documentation
	for AT&T syntax.

2020-02-14  Jan Beulich  <jbeulich@suse.com>

	PR gas/25438
	* config/tc-i386.c (md_assemble): Move movsx/movzx special
	casing ...
	(process_suffix): ... here. Consider just the first operand
	initially.
	(check_long_reg): Drop opcode 0x63 special case again.
	* testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
	testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
	Move ambiguous operand size tests ...
	* testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
	testsuite/gas/i386/noreg64.s: ... here.
	* testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
	testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
	testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
	testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
	testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
	testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
	testsuite/gas/i386/x86-64-movsxd.d,
	testsuite/gas/i386/x86-64-movsxd-intel.d,
	testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
	Adjust expectations.	
	* testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
	testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
	testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
	* testsuite/gas/i386/i386.exp: Run new tests.

2020-02-14  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_operands): Also skip segment
	override prefix emission if it matches an already present one.
	* testsuite/gas/i386/prefix32.s: Add double segment override
	cases.
	* testsuite/gas/i386/prefix32.l: Adjust expectations.

2020-02-14  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_operands): Drop ineffectual segment
	overrides when optimizing.
	* testsuite/gas/i386/lea-optimize.d: New.
	* testsuite/gas/i386/i386.exp: Run new test.

2020-02-14  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_operands): Also check insn prefix
	for ineffectual segment override warning. Don't cover possible
	VEX/EVEX encoded insns there.
	* testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
	testsuite/gas/i386/lea.e: New.
	* testsuite/gas/i386/i386.exp: Run new test.

2020-02-14  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/25438
	* doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
	syntax.

2020-02-13  Fangrui Song   <maskray@google.com>
	    H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/25551
	* config/tc-i386.c (tc_i386_fix_adjustable): Don't check
	BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
	* testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
	* testsuite/gas/i386/relax-5.d: New file.
	* testsuite/gas/i386/relax-5.s: Likewise.
	* testsuite/gas/i386/x86-64-relax-4.d: Likewise.
	* testsuite/gas/i386/x86-64-relax-4.s: Likewise.

2020-02-13  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
	"nosse4" entry.

2020-02-12  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (avx512): New (at file scope), moved from
	(check_VecOperands): ... here.
	(process_suffix): Add [XYZ]MMword operand size handling.
	* testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
	* testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
	tests.
	* testsuite/gas/i386/avx512dq-inval.l,
	testsuite/gas/i386/noavx512-2.l: Adjust expectations.

2020-02-12  Jan Beulich  <jbeulich@suse.com>

	PR gas/24546
	* config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
	code only.
	* config/tc-i386-intel.c (i386_intel_operand): Also handle
	CALL/JMP in O_tbyte_ptr case.
	* doc/c-i386.texi: Mention far call and full pointer load ISA
	differences.
	* testsuite/gas/i386/x86-64-branch-3.s,
	testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
	* testsuite/gas/i386/x86-64-branch-3.d,
	testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
	* testsuite/gas/i386/x86-64-branch-5.l,
	testsuite/gas/i386/x86-64-branch-5.s: New.
	* testsuite/gas/i386/i386.exp: Run new test.

2020-02-12  Jan Beulich  <jbeulich@suse.com>

	PR gas/25438
	* config/tc-i386.c (REGISTER_WARNINGS): Delete.
	(check_byte_reg): Skip only source operand of CRC32. Drop Non-
	64-bit-only warning.
	(check_word_reg): Consistently error on mismatching register
	size and suffix.
	* testsuite/gas/i386/general.s: Replace dword GPR with word one
	for movw. Replace suffix / GPR for orb.
	* testsuite/gas/i386/inval.s: Add tests for movw with dword and
	byte GPRs as well as ones for inb/outb with a word accumulator.
	* testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
	testsuite/gas/i386/inval.l: Adjust expectations.

2020-02-12  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (operand_type_register_match): Also fall
	through initial two if()-s when the template allows for a GPR
	operand. Adjust comment.

2020-02-11  Jan Beulich  <jbeulich@suse.com>

	(struct _i386_insn): New field "short_form".
	(optimize_encoding): Drop setting of shortform field.
	(process_suffix): Set i.short_form. Replace shortform use.
	(process_operands): Replace shortform use.

2020-02-11  Matthew Malcomson  <matthew.malcomson@arm.com>

	* config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
	loop initial declaration.

2020-02-10  Matthew Malcomson  <matthew.malcomson@arm.com>

	* config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
	instructions that can have 5 arguments.
	(enum operand_parse_code): Add new operands.
	(parse_operands): Account for new operands.
	(S5): New macro.
	(enum neon_shape_el): Introduce P suffixes for coprocessor.
	(neon_select_shape): Account for P suffix.
	(LOW1): Move macro to global position.
	(HI4): Move macro to global position.
	(vcx_assign_vec_d): New.
	(vcx_assign_vec_m): New.
	(vcx_assign_vec_n): New.
	(enum vcx_reg_type): New.
	(vcx_get_reg_type): New.
	(vcx_size_pos): New.
	(vcx_vec_pos): New.
	(vcx_handle_shape): New.
	(vcx_ensure_register_in_range): New.
	(vcx_handle_register_arguments): New.
	(vcx_handle_insn_block): New.
	(vcx_handle_common_checks): New.
	(do_vcx1): New.
	(do_vcx2): New.
	(do_vcx3): New.
	* testsuite/gas/arm/cde-missing-fp.d: New test.
	* testsuite/gas/arm/cde-missing-fp.l: New test.
	* testsuite/gas/arm/cde-missing-mve.d: New test.
	* testsuite/gas/arm/cde-missing-mve.l: New test.
	* testsuite/gas/arm/cde-mve-or-neon.d: New test.
	* testsuite/gas/arm/cde-mve-or-neon.s: New test.
	* testsuite/gas/arm/cde-mve.s: New test.
	* testsuite/gas/arm/cde-warnings.l:
	* testsuite/gas/arm/cde-warnings.s:
	* testsuite/gas/arm/cde.d:
	* testsuite/gas/arm/cde.s:

2020-02-10  Stam Markianos-Wright  <stam.markianos-wright@arm.com>
	    Matthew Malcomson  <matthew.malcomson@arm.com>

	* config/tc-arm.c (arm_ext_cde*): New feature sets for each
	CDE coprocessor that can be enabled.
	(enum pred_instruction_type): New pred type.
	(BAD_NO_VPT): New error message.
	(BAD_CDE): New error message.
	(BAD_CDE_COPROC): New error message.
	(enum operand_parse_code): Add new immediate operands.
	(parse_operands): Account for new immediate operands.
	(check_cde_operand): New.
	(cde_coproc_enabled): New.
	(cde_coproc_pos): New.
	(cde_handle_coproc): New.
	(cxn_handle_predication): New.
	(do_custom_instruction_1): New.
	(do_custom_instruction_2): New.
	(do_custom_instruction_3): New.
	(do_cx1): New.
	(do_cx1a): New.
	(do_cx1d): New.
	(do_cx1da): New.
	(do_cx2): New.
	(do_cx2a): New.
	(do_cx2d): New.
	(do_cx2da): New.
	(do_cx3): New.
	(do_cx3a): New.
	(do_cx3d): New.
	(do_cx3da): New.
	(handle_pred_state): Define new IT block behaviour.
	(insns): Add newn CX*{,d}{,a} instructions.
	(CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
	Define new cdecp extension strings.
	* doc/c-arm.texi: Document new cdecp extension arguments.
	* testsuite/gas/arm/cde-scalar.d: New test.
	* testsuite/gas/arm/cde-scalar.s: New test.
	* testsuite/gas/arm/cde-warnings.d: New test.
	* testsuite/gas/arm/cde-warnings.l: New test.
	* testsuite/gas/arm/cde-warnings.s: New test.
	* testsuite/gas/arm/cde.d: New test.
	* testsuite/gas/arm/cde.s: New test.

2020-02-10  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/25516
	* config/tc-i386.c (intel64): Renamed to ...
	(isa64): This.
	(match_template): Accept Intel64 only instruction by default.
	(i386_displacement): Updated.
	(md_parse_option): Updated.
	* c-i386.texi: Update -mamd64/-mintel64 documentation.
	* testsuite/gas/i386/i386.exp: Run x86-64-sysenter.  Pass
	-mamd64 to x86-64-sysenter-amd.
	* testsuite/gas/i386/x86-64-sysenter.d: New file.

2020-02-10  Alan Modra  <amodra@gmail.com>

	* config/obj-elf.c (obj_elf_change_section): Error for section
	type, attr or entsize changes in assembly.
	* testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
	* testsuite/gas/elf/section5.l: Update.

2020-02-10  Alan Modra  <amodra@gmail.com>

	* output-file.c (output_file_close): Do a normal close when
	flag_always_generate_output.
	* write.c (write_object_file): Don't stop output when
	flag_always_generate_output.

2020-02-07  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25469
	* config/tc-z80.c: Add -gbz80 command line option to generate code
	for the GameBoy Z80.  Add support for generating DWARF.
	* config/tc-z80.h: Add support for DWARF debug information
	generation.
	* doc/c-z80.texi: Document new command line option.
	* testsuite/gas/z80/gbz80_all.d: New file.
	* testsuite/gas/z80/gbz80_all.s: New file.
	* testsuite/gas/z80/z80.exp: Run the new tests.
	* testsuite/gas/z80/z80n_all.d: New file.
	* testsuite/gas/z80/z80n_all.s: New file.
	* testsuite/gas/z80/z80n_reloc.d: New file.

2020-02-06  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/25381
	* config/obj-elf.c (get_section): Also check
	linked_to_symbol_name.
	(obj_elf_change_section): Also set map_head.linked_to_symbol_name.
	(obj_elf_parse_section_letters): Handle the 'o' flag.
	(build_group_lists): Renamed to ...
	(build_additional_section_info): This.  Set elf_linked_to_section
	from map_head.linked_to_symbol_name.
	(elf_adjust_symtab): Updated.
	* config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
	* doc/as.texi: Document the 'o' flag.
	* testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
	* testsuite/gas/elf/section18.d: New file.
	* testsuite/gas/elf/section18.s: Likewise.
	* testsuite/gas/elf/section19.d: Likewise.
	* testsuite/gas/elf/section19.s: Likewise.
	* testsuite/gas/elf/section20.d: Likewise.
	* testsuite/gas/elf/section20.s: Likewise.
	* testsuite/gas/elf/section21.d: Likewise.
	* testsuite/gas/elf/section21.l: Likewise.
	* testsuite/gas/elf/section21.s: Likewise.

2020-02-06  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention x86 assembler options to align branches for
	binutils 2.34.

2020-02-06  H.J. Lu  <hongjiu.lu@intel.com>

	* testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
	only for ELF targets.
	* testsuite/gas/i386/unique.d: Don't xfail.
	* testsuite/gas/i386/x86-64-unique.d: Likewise.

2020-02-06  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/i386/unique.d: xfail for non-elf targets.
	* testsuite/gas/i386/x86-64-unique.d: Likewise.

2020-02-06  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
	xfail, and rename test.
	* testsuite/gas/elf/section12b.d: Likewise.
	* testsuite/gas/elf/section16a.d: Likewise.
	* testsuite/gas/elf/section16b.d: Likewise.

2020-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/25380
	* config/obj-elf.c (section_match): Removed.
	(get_section): Also match SEC_ASSEMBLER_SECTION_ID and
	section_id.
	(obj_elf_change_section): Replace info and group_name arguments
	with match_p.  Also update the section ID and flags from match_p.
	(obj_elf_section): Handle "unique,N".  Update call to
	obj_elf_change_section.
	* config/obj-elf.h (elf_section_match): New.
	(obj_elf_change_section): Updated.
	* config/tc-arm.c (start_unwind_section): Update call to
	obj_elf_change_section.
	* config/tc-ia64.c (obj_elf_vms_common): Likewise.
	* config/tc-microblaze.c (microblaze_s_data): Likewise.
	(microblaze_s_sdata): Likewise.
	(microblaze_s_rdata): Likewise.
	(microblaze_s_bss): Likewise.
	* config/tc-mips.c (s_change_section): Likewise.
	* config/tc-msp430.c (msp430_profiler): Likewise.
	* config/tc-rx.c (parse_rx_section): Likewise.
	* config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
	* doc/as.texi: Document "unique,N" in .section directive.
	* testsuite/gas/elf/elf.exp: Run "unique,N" tests.
	* testsuite/gas/elf/section15.d: New file.
	* testsuite/gas/elf/section15.s: Likewise.
	* testsuite/gas/elf/section16.s: Likewise.
	* testsuite/gas/elf/section16a.d: Likewise.
	* testsuite/gas/elf/section16b.d: Likewise.
	* testsuite/gas/elf/section17.d: Likewise.
	* testsuite/gas/elf/section17.l: Likewise.
	* testsuite/gas/elf/section17.s: Likewise.
	* testsuite/gas/i386/unique.d: Likewise.
	* testsuite/gas/i386/unique.s: Likewise.
	* testsuite/gas/i386/x86-64-unique.d: Likewise.
	* testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.

2020-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* testsuite/gas/elf/section13.s: Replace @nobits with %nobits.

2020-02-01  Anthony Green  <green@moxielogic.com>

       * config/tc-moxie.c (md_begin): Don't force big-endian mode.

2020-01-31  Sandra Loosemore  <sandra@codesourcery.com>

	* config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
	%tls_ldo.

2020-01-31  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR gas/25472
	* config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
	(armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
	+mve.
	* testsuite/gas/arm/mve_dsp.d: New test.

2020-01-31  Nick Clifton  <nickc@redhat.com>

	* config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
	rather than BFD_RELOC_NONE.

2020-01-31  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	* config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
	to support VLDMIA instruction for MVE.
	(fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
	instruction for MVE.
	(fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
	instruction for MVE.
	(fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
	instruction for MVE.
	* testsuite/gas/arm/mve-ldst.d: New test.
	* testsuite/gas/arm/mve-ldst.s: Likewise.

2020-01-31  Nick Clifton  <nickc@redhat.com>

	* po/fr.po: Updated French translation.
	* po/ru.po: Updated Russian translation.

2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>

	* testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
	.s for the movprfx.
	* testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
	* testsuite/gas/aarch64/sve-movprfx_28.d,
	* testsuite/gas/aarch64/sve-movprfx_28.l,
	* testsuite/gas/aarch64/sve-movprfx_28.s: New test.

2020-01-30  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (output_disp): Tighten base_opcode check.
	* testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
	* testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
	Adjust expectations.

2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
	* testsuite/gas/bpf/alu-be.d: Likewise.
	* testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
	* testsuite/gas/bpf/alu32-be.d: Likewise.

2020-01-30  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/x86-64-branch-2.s,
	testsuite/gas/i386/x86-64-branch-4.s,
	testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
	* testsuite/gas/i386/ilp32/x86-64-branch.d,
	testsuite/gas/i386/x86-64-branch-2.d,
	testsuite/gas/i386/x86-64-branch-4.l,
	testsuite/gas/i386/x86-64-branch.d: Adjust expectations.

2020-01-30  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_suffix): .
	testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
	testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
	Add LRETQ case.
	testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
	suffix.
	testsuite/gas/i386/x86_64.s: Add RETF cases.
	* testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
	testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
	testsuite/gas/i386/x86-64-opcode.d,
	testsuite/gas/i386/x86-64-suffix-intel.d,
	testsuite/gas/i386/x86-64-suffix.d,
	testsuite/gas/i386/x86_64-intel.d
	testsuite/gas/i386/x86_64.d: Adjust expectations.
	* testsuite/gas/i386/x86-64-suffix.e,
	testsuite/gas/i386/x86_64.e: New.

2020-01-30  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_suffix): Redo and move FLDENV et al
	special case.

2020-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/25445
	* config/tc-i386.c (check_long_reg): Also convert to QWORD for
	movsxd.
	* doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
	differences.  Document movslq and movsxd.
	* testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
	* testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
	* testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
	* testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
	* testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
	* testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
	* testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
	* testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
	* testsuite/gas/i386/x86-64-movsxd.d: Likewise.
	* testsuite/gas/i386/x86-64-movsxd.s: Likewise.

2020-01-27  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/all/gas.exp: Replace case statements with switch
	statements.
	* testsuite/gas/elf/elf.exp: Likewise.
	* testsuite/gas/macros/macros.exp: Likewise.
	* testsuite/lib/gas-defs.exp: Likewise.

2020-01-27  Tamar Christina  <tamar.christina@arm.com>

	PR 25403
	* testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
	* testsuite/gas/aarch64/armv8_4-a.s: Likewise.

2020-01-22  Maxim Blinov  <maxim.blinov@embecosm.com>

	* testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
	s exts must be known, so rename *ok* to *fail*.
	* testsuite/gas/riscv/march-ok-sx.d: Likewise.
	* testsuite/gas/riscv/march-ok-s-with-version: Likewise.
	* testsuite/gas/riscv/march-fail-s.l: Expected error messages for
	above change.
	* testsuite/gas/riscv/march-fail-sx.l: Likewise.
	* testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.

2020-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/25438
	* config/tc-i386.c (check_long_reg): Always disallow double word
	suffix in mnemonic with word general register.
	* testsuite/gas/i386/general.s: Replace word general register
	with double word general register for movl.
	* testsuite/gas/i386/inval.s: Add tests for movl with word general
	register.
	* testsuite/gas/i386/general.l: Updated.
	* testsuite/gas/i386/inval.l: Likewise.

2020-01-22  Alan Modra  <amodra@gmail.com>

	* config/tc-ppc.c (parse_tls_arg): Handle tls arg for
	__tls_get_addr_desc and __tls_get_addr_opt.

2020-01-21  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/inval-crc32.s,
	testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
	* testsuite/gas/i386/inval-crc32.l,
	testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.

2020-01-21  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_suffix): Merge CRC32 handling into
	generic code path. Deal with No_lSuf being set in a template.
	* testsuite/gas/i386/inval-crc32.l,
	testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
	instead of error(s) when operand size is ambiguous.
	* testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
	testsuite/gas/i386/noreg64.s: Add CRC32 tests.
	* testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
	testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
	testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
	Adjust expectations.

2020-01-21  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (process_suffix): Drop SYSRET special case
	and an intel_syntax check. Re-write lack-of-suffix processing
	logic.
	* doc/c-i386.texi: Document operand size defaults for suffix-
	less AT&T syntax insns.
	* testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
	testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
	testsuite/gas/i386/x86-64-avx-scalar.s,
	testsuite/gas/i386/x86-64-avx.s,
	testsuite/gas/i386/x86-64-bundle.s,
	testsuite/gas/i386/x86-64-intel64.s,
	testsuite/gas/i386/x86-64-lock-1.s,
	testsuite/gas/i386/x86-64-opcode.s,
	testsuite/gas/i386/x86-64-sse2avx.s,
	testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
	* testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
	testsuite/gas/i386/x86-64-nops.s,
	testsuite/gas/i386/x86-64-ptwrite.s,
	testsuite/gas/i386/x86-64-simd.s,
	testsuite/gas/i386/x86-64-sse-noavx.s,
	testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
	insns.
	* testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
	testsuite/gas/i386/noreg64.s: Add further tests.
	* testsuite/gas/i386/ilp32/x86-64-nops.d,
	testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
	testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
	testsuite/gas/i386/sse-noavx.d,
	testsuite/gas/i386/x86-64-intel64.d,
	testsuite/gas/i386/x86-64-nops.d,
	testsuite/gas/i386/x86-64-opcode.d,
	testsuite/gas/i386/x86-64-ptwrite-intel.d,
	testsuite/gas/i386/x86-64-ptwrite.d,
	testsuite/gas/i386/x86-64-simd-intel.d,
	testsuite/gas/i386/x86-64-simd-suffix.d,
	testsuite/gas/i386/x86-64-simd.d,
	testsuite/gas/i386/x86-64-sse-noavx.d
	testsuite/gas/i386/x86-64-suffix.d,
	testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
	* testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
	testsuite/gas/i386/noreg64.l: New.
	* testsuite/gas/i386/i386.exp: Run new tests.

2020-01-21  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/avx512_bf16_vl.s,
	testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
	of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
	broadcast forms of VCVTNEPS2BF16.
	* testsuite/gas/i386/avx512_bf16_vl.d,
	testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.

2020-01-20  Nick Clifton  <nickc@redhat.com>

	* po/uk.po: Updated Ukranian translation.

2020-01-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/25416
	* config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
	for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
	x32 object.
	* testsuite/gas/i386/ilp32/x32-tls.d: Updated.
	* testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
	R_X86_64_GOTPC32_TLSDESC relocation.

2020-01-18  Nick Clifton  <nickc@redhat.com>

	* configure: Regenerate.
	* po/gas.pot: Regenerate.

2020-01-18  Nick Clifton  <nickc@redhat.com>

	Binutils 2.34 branch created.

2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
	with vex_encoding_vex.
	(parse_insn): Likewise.
	* doc/c-i386.texi: Replace {vex2} with {vex}.  Update {vex}
	and {vex3} documentation.
	* testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
	{vex}.
	* testsuite/gas/i386/x86-64-pseudos.s: Likewise.

2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR 25376
	* config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
	(armv8_1m_main_ext_table): Use CORE_HIGH for mve.
	* testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
	* testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
	* testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
	* testsuite/arm/armv8_1-m-fpu-mve-2.d: New.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (match_template): Drop found_cpu_match local
	variable.

2020-01-16  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/avx512dq-inval.l,
	testsuite/gas/i386/avx512dq-inval.s: New.
	* testsuite/gas/i386/i386.exp: Run new test.

2020-01-15  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
	relocations when the target is 430X, except when extracting part of an
	expression.
	(msp430_srcoperand): Adjust comment.
	Initialize the expp member of the msp430_operand_s struct as
	appropriate.
	(msp430_dstoperand): Likewise.
	* testsuite/gas/msp430/msp430.exp: Run new test.
	* testsuite/gas/msp430/reloc-lo-430x.d: New test.
	* testsuite/gas/msp430/reloc-lo-430x.s: New test.

2020-01-15  Alan Modra  <amodra@gmail.com>

	* configure.tgt: Add sparc-*-freebsd case.

2020-01-14  Lili Cui <lili.cui@intel.com>

	* testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
	* testsuite/gas/i386/align-branch-1b.d: Likewise.
	* testsuite/gas/i386/align-branch-1c.d: Likewise.
	* testsuite/gas/i386/align-branch-1d.d: Likewise.
	* testsuite/gas/i386/align-branch-1e.d: Likewise.
	* testsuite/gas/i386/align-branch-1f.d: Likewise.
	* testsuite/gas/i386/align-branch-1g.d: Likewise.
	* testsuite/gas/i386/align-branch-1h.d: Likewise.
	* testsuite/gas/i386/align-branch-1i.d: Likewise.
	* testsuite/gas/i386/align-branch-5.d: Likewise.
	* testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
	* testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
	* testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
	* testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
	* testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
	* testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
	* testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
	* testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
	* testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
	* testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
	* testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
	x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.

2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25377
	* config/tc-z80.c: Add support for half precision, single
	precision and double precision floating point values.
	* config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
	* doc/as.texi: Add new z80 command line options.
	* doc/c-z80.texi: Document new z80 command line options.
	* testsuite/gas/z80/ez80_pref_dis.s: New test.
	* testsuite/gas/z80/ez80_pref_dis.d: New test driver.
	* testsuite/gas/z80/z80.exp: Run the new test.
	* testsuite/gas/z80/fp_math48.d: Use correct command line option.
	* testsuite/gas/z80/fp_zeda32.d: Likewise.
	* testsuite/gas/z80/strings.d: Update expected output.

2020-01-13  Matthew Malcomson  <matthew.malcomson@arm.com>

	* config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
	dependency.

2020-01-13  Claudiu Zissulescu  <claziss@gmail.com>

	* config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
	the CPU.
	* config/tc-arc.h: Add header if/defs.
	* testsuite/gas/arc/pseudos.d: Improve matching pattern.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/wasm32/allinsn.d: Update expected output.

2020-01-13  Alan Modra  <amodra@gmail.com>

	* config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
	insertion.

2020-01-10  Alan Modra  <amodra@gmail.com>

	* testsuite/gas/elf/pr14891.s: Don't start directives in first column.
	* testsuite/gas/elf/pr21661.d: Don't run on hpux.

2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25224
	* config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
	opcode byte values.
	(emit_ld_r_r): Likewise.
	(emit_ld_rr_m): Likewise.
	(emit_ld_rr_nn): Likewise.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (optimize_encoding): Add
	is_any_vex_encoding() invocations. Drop respective
	i.tm.extension_opcode == None checks.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (md_assemble): Check RegRex is clear during
	REX transformations. Correct comment indentation.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* config/tc-i386.c (optimize_encoding): Generalize register
	transformation for TEST optimization.

2020-01-09  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/i386/x86-64-sysenter-amd.s,
	testsuite/gas/i386/x86-64-sysenter-amd.d,
	testsuite/gas/i386/x86-64-sysenter-amd.l,
	testsuite/gas/i386/x86-64-sysenter-intel.d,
	testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
	* testsuite/gas/i386/i386.exp: Run new tests.

2020-01-08  Nick Clifton  <nickc@redhat.com>

	PR 25284
	* doc/as.texi (Align): Document the fact that all arguments can be
	omitted.
	(Balign): Likewise.
	(P2align): Likewise.

2020-01-08  Nick Clifton  <nickc@redhat.com>

	PR 14891
	* config/obj-elf.c (obj_elf_section): Fail if the section name is
	already defined as a different symbol type.
	* testsuite/gas/elf/pr14891.s: New test source file.
	* testsuite/gas/elf/pr14891.d: New test driver.
	* testsuite/gas/elf/pr14891.s: New test expected error output.
	* testsuite/gas/elf/elf.exp: Run the new test.

2020-01-08  Alan Modra  <amodra@gmail.com>

	* config/tc-z8k.c (md_begin): Make idx unsigned.
	(get_specific): Likewise for this_index.

2020-01-07  Claudiu Zissulescu  <claziss@synopsys.com>

	* onfig/tc-arc.c (parse_reloc_symbol): New function.
	(tokenize_arguments): Clean up, use parse_reloc_symbol function.
	(md_operand): Set X_md to absent.
	(arc_parse_name): Check for X_md.

2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>

	PR 25311
	* as.h (TC_STRING_ESCAPES): Provide a default definition.
	* app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
	NO_STRING_ESCAPES.
	* read.c (next_char_of_string): Likewise.
	* config/tc-ppc.h (TC_STRING_ESCAPES): Define.
	* config/tc-z80.h (TC_STRING_ESCAPES): Define.

2020-01-03  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
	* testsuite/gas/aarch64/f64mm.d: Adjust expectations.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
	by-element usdot. Add 64-bit form tests for by-element sudot.
	* testsuite/gas/aarch64/i8mm.d: Adjust expectations.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
	* testsuite/gas/aarch64/f64mm.d: Adjust expectations.

2020-01-03  Jan Beulich  <jbeulich@suse.com>

	* testsuite/gas/aarch64/f64mm.d,
	testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.

2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>

	* config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
	support for assembler code generated by SDCC. Add new relocation
	types. Add z80-elf target support.
	* config/tc-z80.h: Add z80-elf target support. Enable dollar local
	labels. Local labels starts from ".L".
	* NEWS: Mention the new support.
	* testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
	* testsuite/gas/all/fwdexp.s: Likewise.
	* testsuite/gas/all/cond.l: Likewise.
	* testsuite/gas/all/cond.s: Likewise.
	* testsuite/gas/all/fwdexp.d: Likewise.
	* testsuite/gas/all/fwdexp.s: Likewise.
	* testsuite/gas/elf/section2.e-mips: Likewise.
	* testsuite/gas/elf/section2.l: Likewise.
	* testsuite/gas/elf/section2.s: Likewise.
	* testsuite/gas/macros/app1.d: Likewise.
	* testsuite/gas/macros/app1.s: Likewise.
	* testsuite/gas/macros/app2.d: Likewise.
	* testsuite/gas/macros/app2.s: Likewise.
	* testsuite/gas/macros/app3.d: Likewise.
	* testsuite/gas/macros/app3.s: Likewise.
	* testsuite/gas/macros/app4.d: Likewise.
	* testsuite/gas/macros/app4.s: Likewise.
	* testsuite/gas/macros/app4b.s: Likewise.
	* testsuite/gas/z80/suffix.d: Fix failure on ELF target.
	* testsuite/gas/z80/z80.exp: Add new tests
	* testsuite/gas/z80/dollar.d: New file.
	* testsuite/gas/z80/dollar.s: New file.
	* testsuite/gas/z80/ez80_adl_all.d: New file.
	* testsuite/gas/z80/ez80_adl_all.s: New file.
	* testsuite/gas/z80/ez80_adl_suf.d: New file.
	* testsuite/gas/z80/ez80_isuf.s: New file.
	* testsuite/gas/z80/ez80_z80_all.d: New file.
	* testsuite/gas/z80/ez80_z80_all.s: New file.
	* testsuite/gas/z80/ez80_z80_suf.d: New file.
	* testsuite/gas/z80/r800_extra.d: New file.
	* testsuite/gas/z80/r800_extra.s: New file.
	* testsuite/gas/z80/r800_ii8.d: New file.
	* testsuite/gas/z80/r800_z80_doc.d: New file.
	* testsuite/gas/z80/z180.d: New file.
	* testsuite/gas/z80/z180.s: New file.
	* testsuite/gas/z80/z180_z80_doc.d: New file.
	* testsuite/gas/z80/z80_doc.d: New file.
	* testsuite/gas/z80/z80_doc.s: New file.
	* testsuite/gas/z80/z80_ii8.d: New file.
	* testsuite/gas/z80/z80_ii8.s: New file.
	* testsuite/gas/z80/z80_in_f_c.d: New file.
	* testsuite/gas/z80/z80_in_f_c.s: New file.
	* testsuite/gas/z80/z80_op_ii_ld.d: New file.
	* testsuite/gas/z80/z80_op_ii_ld.s: New file.
	* testsuite/gas/z80/z80_out_c_0.d: New file.
	* testsuite/gas/z80/z80_out_c_0.s: New file.
	* testsuite/gas/z80/z80_reloc.d: New file.
	* testsuite/gas/z80/z80_reloc.s: New file.
	* testsuite/gas/z80/z80_sli.d: New file.
	* testsuite/gas/z80/z80_sli.s: New file.

2020-01-02  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
	REGLIST_RN.

2020-01-01  Alan Modra  <amodra@gmail.com>

	Update year range in copyright notice of all files.

For older changes see ChangeLog-2019

Copyright (C) 2020 Free Software Foundation, Inc.

Copying and distribution of this file, with or without modification,
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